CPU: Implement instruction cache simulation
Implemented for all execution modes. Disabled by default in the cached interpreter and recompiler, always enabled in the pure interpreter.
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@ -61,6 +61,8 @@ struct CodeBlock
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std::vector<CodeBlock*> link_predecessors;
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std::vector<CodeBlock*> link_successors;
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TickCount uncached_fetch_ticks = 0;
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u32 icache_line_count = 0;
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bool invalidated = false;
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const u32 GetPC() const { return key.GetPC(); }
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