System: Support loading expansion ROMs
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@ -80,6 +80,15 @@ bool Bus::DispatchAccess(PhysicalMemoryAddress cpu_address, PhysicalMemoryAddres
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{
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return DoRAMAccess<type, size>(bus_address, value);
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}
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else if (bus_address < EXP1_BASE)
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{
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return DoInvalidAccess(type, size, cpu_address, bus_address, value);
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}
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else if (bus_address < (EXP1_BASE + EXP1_SIZE))
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{
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return (type == MemoryAccessType::Read) ? DoReadEXP1(size, bus_address & EXP1_MASK, value) :
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DoWriteEXP1(size, bus_address & EXP1_MASK, value);
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}
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else if (bus_address < PAD_BASE)
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{
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return DoInvalidAccess(type, size, cpu_address, bus_address, value);
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@ -89,6 +98,11 @@ bool Bus::DispatchAccess(PhysicalMemoryAddress cpu_address, PhysicalMemoryAddres
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return (type == MemoryAccessType::Read) ? DoReadPad(size, bus_address & PAD_MASK, value) :
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DoWritePad(size, bus_address & PAD_MASK, value);
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}
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else if (bus_address < (SIO_BASE + SIO_SIZE))
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{
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return (type == MemoryAccessType::Read) ? DoReadSIO(size, bus_address & SIO_MASK, value) :
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DoWriteSIO(size, bus_address & SIO_MASK, value);
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}
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else if (bus_address < INTERRUPT_CONTROLLER_BASE)
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{
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return DoInvalidAccess(type, size, cpu_address, bus_address, value);
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@ -150,8 +164,8 @@ bool Bus::DispatchAccess(PhysicalMemoryAddress cpu_address, PhysicalMemoryAddres
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}
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else if (bus_address < (EXP2_BASE + EXP2_SIZE))
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{
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return (type == MemoryAccessType::Read) ? ReadExpansionRegion2(size, bus_address & EXP2_MASK, value) :
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WriteExpansionRegion2(size, bus_address & EXP2_MASK, value);
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return (type == MemoryAccessType::Read) ? DoReadEXP2(size, bus_address & EXP2_MASK, value) :
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DoWriteEXP2(size, bus_address & EXP2_MASK, value);
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}
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else if (bus_address < BIOS_BASE)
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{
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