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Add interrupt controller emulation

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This commit is contained in:
Connor McLaughlin
2019-09-17 16:26:00 +10:00
parent c615e007c0
commit 2128a2984b
13 changed files with 271 additions and 19 deletions
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28
src/pse/bus.cpp
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@ -3,22 +3,34 @@
#include "YBaseLib/Log.h"
#include "YBaseLib/String.h"
#include "common/state_wrapper.h"
#include "cpu_core.h"
#include "cpu_disasm.h"
#include "dma.h"
#include "gpu.h"
#include "interrupt_controller.h"
#include <cstdio>
Log_SetChannel(Bus);
// Offset and value remapping for (w32) registers from nocash docs.
void FixupUnalignedWordAccessW32(u32& offset, u32& value)
{
const u32 byte_offset = offset & u32(3);
offset &= ~u32(3);
value <<= byte_offset * 8;
}
Bus::Bus() = default;
Bus::~Bus() = default;
bool Bus::Initialize(System* system, DMA* dma, GPU* gpu)
bool Bus::Initialize(CPU::Core* cpu, DMA* dma, InterruptController* interrupt_controller, GPU* gpu)
{
if (!LoadBIOS())
return false;
m_cpu = cpu;
m_dma = dma;
m_interrupt_controller = interrupt_controller;
m_gpu = gpu;
return true;
}
@ -216,6 +228,20 @@ bool Bus::DoWriteGPU(MemoryAccessSize size, u32 offset, u32 value)
return true;
}
bool Bus::DoReadInterruptController(MemoryAccessSize size, u32 offset, u32& value)
{
FixupUnalignedWordAccessW32(offset, value);
value = m_interrupt_controller->ReadRegister(offset);
return true;
}
bool Bus::DoWriteInterruptController(MemoryAccessSize size, u32 offset, u32 value)
{
FixupUnalignedWordAccessW32(offset, value);
m_interrupt_controller->WriteRegister(offset, value);
return true;
}
bool Bus::ReadSPU(MemoryAccessSize size, u32 offset, u32& value)
{
if (offset == 0x1AE)