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CPU: Implement alignment (memory) exception

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This commit is contained in:
Connor McLaughlin
2019-09-14 14:29:23 +10:00
parent 0726095f00
commit 32a36ef1bc
3 changed files with 110 additions and 54 deletions
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24
src/pse/cpu_core.h
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@ -45,15 +45,18 @@ private:
template<MemoryAccessType type, MemoryAccessSize size, bool is_instruction_fetch, bool raise_exceptions>
bool DoMemoryAccess(VirtualMemoryAddress address, u32& value);
template<MemoryAccessType type, MemoryAccessSize size>
bool DoAlignmentCheck(VirtualMemoryAddress address);
template<MemoryAccessType type, MemoryAccessSize size>
void DoScratchpadAccess(PhysicalMemoryAddress address, u32& value);
u8 ReadMemoryByte(VirtualMemoryAddress addr);
u16 ReadMemoryHalfWord(VirtualMemoryAddress addr);
u32 ReadMemoryWord(VirtualMemoryAddress addr);
void WriteMemoryByte(VirtualMemoryAddress addr, u8 value);
void WriteMemoryHalfWord(VirtualMemoryAddress addr, u16 value);
void WriteMemoryWord(VirtualMemoryAddress addr, u32 value);
bool ReadMemoryByte(VirtualMemoryAddress addr, u8* value);
bool ReadMemoryHalfWord(VirtualMemoryAddress addr, u16* value);
bool ReadMemoryWord(VirtualMemoryAddress addr, u32* value);
bool WriteMemoryByte(VirtualMemoryAddress addr, u8 value);
bool WriteMemoryHalfWord(VirtualMemoryAddress addr, u16 value);
bool WriteMemoryWord(VirtualMemoryAddress addr, u32 value);
// state helpers
bool InUserMode() const { return m_cop0_regs.sr.KUc; }
@ -63,10 +66,10 @@ private:
// Fetches the instruction at m_regs.npc
void FetchInstruction();
void ExecuteInstruction(Instruction inst, u32 inst_pc);
void ExecuteCop0Instruction(Instruction inst, u32 inst_pc);
void ExecuteInstruction(Instruction inst);
void ExecuteCop0Instruction(Instruction inst);
void Branch(u32 target);
void RaiseException(u32 inst_pc, Exception excode);
void RaiseException(Exception excode);
// clears pipeline of load/branch delays
void FlushPipeline();
@ -87,6 +90,9 @@ private:
bool m_in_branch_delay_slot = false;
bool m_branched = false;
// address of the instruction currently being executed
u32 m_current_instruction_pc = 0;
// load delays
Reg m_load_delay_reg = Reg::count;
u32 m_load_delay_old_value = 0;