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Log: Simplify macros

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This commit is contained in:
Stenzek
2024-05-23 20:55:28 +10:00
parent 792717e03e
commit 4e922a34a7
144 changed files with 2273 additions and 2363 deletions
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20
src/core/cpu_newrec_compiler_riscv64.cpp
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@ -173,11 +173,11 @@ void CPU::CodeCache::DisassembleAndLogHostCode(const void* start, u32 size)
size_t instlen;
inst_fetch(cur, &inst, &instlen);
disasm_inst(buf, std::size(buf), rv64, static_cast<u64>(reinterpret_cast<uintptr_t>(cur)), inst);
Log_DebugFmt("\t0x{:016X}\t{}", static_cast<u64>(reinterpret_cast<uintptr_t>(cur)), buf);
DEBUG_LOG("\t0x{:016X}\t{}", static_cast<u64>(reinterpret_cast<uintptr_t>(cur)), buf);
cur += instlen;
}
#else
Log_ErrorPrint("Not compiled with ENABLE_HOST_DISASSEMBLY.");
ERROR_LOG("Not compiled with ENABLE_HOST_DISASSEMBLY.");
#endif
}
@ -197,7 +197,7 @@ u32 CPU::CodeCache::GetHostInstructionCount(const void* start, u32 size)
}
return icount;
#else
Log_ErrorPrint("Not compiled with ENABLE_HOST_DISASSEMBLY.");
ERROR_LOG("Not compiled with ENABLE_HOST_DISASSEMBLY.");
return 0;
#endif
}
@ -665,7 +665,7 @@ void CPU::NewRec::RISCV64Compiler::EndAndLinkBlock(const std::optional<u32>& new
if (newpc.value() == m_block->pc)
{
// Special case: ourselves! No need to backlink then.
Log_DebugFmt("Linking block at {:08X} to self", m_block->pc);
DEBUG_LOG("Linking block at {:08X} to self", m_block->pc);
rvEmitJmp(rvAsm, rvAsm->GetBufferPointer(0));
}
else
@ -754,7 +754,7 @@ biscuit::GPR CPU::NewRec::RISCV64Compiler::CFGetSafeRegS(CompileFlags cf, const
}
else
{
Log_WarningFmt("Hit memory path in CFGetSafeRegS() for {}", GetRegName(cf.MipsS()));
WARNING_LOG("Hit memory path in CFGetSafeRegS() for {}", GetRegName(cf.MipsS()));
rvAsm->LW(temp_reg, PTR(&g_state.regs.r[cf.mips_s]));
return temp_reg;
}
@ -776,7 +776,7 @@ biscuit::GPR CPU::NewRec::RISCV64Compiler::CFGetSafeRegT(CompileFlags cf, const
}
else
{
Log_WarningFmt("Hit memory path in CFGetSafeRegT() for {}", GetRegName(cf.MipsT()));
WARNING_LOG("Hit memory path in CFGetSafeRegT() for {}", GetRegName(cf.MipsT()));
rvAsm->LW(temp_reg, PTR(&g_state.regs.r[cf.mips_t]));
return temp_reg;
}
@ -825,7 +825,7 @@ void CPU::NewRec::RISCV64Compiler::MoveSToReg(const biscuit::GPR& dst, CompileFl
}
else
{
Log_WarningFmt("Hit memory path in MoveSToReg() for {}", GetRegName(cf.MipsS()));
WARNING_LOG("Hit memory path in MoveSToReg() for {}", GetRegName(cf.MipsS()));
rvAsm->LW(dst, PTR(&g_state.regs.r[cf.mips_s]));
}
}
@ -843,7 +843,7 @@ void CPU::NewRec::RISCV64Compiler::MoveTToReg(const biscuit::GPR& dst, CompileFl
}
else
{
Log_WarningFmt("Hit memory path in MoveTToReg() for {}", GetRegName(cf.MipsT()));
WARNING_LOG("Hit memory path in MoveTToReg() for {}", GetRegName(cf.MipsT()));
rvAsm->LW(dst, PTR(&g_state.regs.r[cf.mips_t]));
}
}
@ -2214,7 +2214,7 @@ void CPU::NewRec::RISCV64Compiler::Compile_mtc0(CompileFlags cf)
if (mask == 0)
{
// if it's a read-only register, ignore
Log_DebugFmt("Ignoring write to read-only cop0 reg {}", static_cast<u32>(reg));
DEBUG_LOG("Ignoring write to read-only cop0 reg {}", static_cast<u32>(reg));
return;
}
@ -2273,7 +2273,7 @@ void CPU::NewRec::RISCV64Compiler::Compile_mtc0(CompileFlags cf)
if (reg == Cop0Reg::DCIC && g_settings.cpu_recompiler_memory_exceptions)
{
// TODO: DCIC handling for debug breakpoints
Log_WarningPrint("TODO: DCIC handling for debug breakpoints");
WARNING_LOG("TODO: DCIC handling for debug breakpoints");
}
}