CPU/CodeCache: Rewrite using new-rec's block management
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@ -1,15 +1,11 @@
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// SPDX-FileCopyrightText: 2019-2022 Connor McLaughlin <stenzek@gmail.com>
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// SPDX-FileCopyrightText: 2019-2023 Connor McLaughlin <stenzek@gmail.com>
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// SPDX-License-Identifier: (GPL-3.0 OR CC-BY-NC-ND-4.0)
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#pragma once
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#include "cpu_code_cache.h"
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#include "cpu_types.h"
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namespace CPU {
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struct CodeBlock;
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struct CodeBlockInstruction;
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namespace Recompiler::Thunks {
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namespace CPU::Recompiler::Thunks {
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//////////////////////////////////////////////////////////////////////////
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// Trampolines for calling back from the JIT
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@ -18,7 +14,6 @@ namespace Recompiler::Thunks {
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//////////////////////////////////////////////////////////////////////////
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bool InterpretInstruction();
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bool InterpretInstructionPGXP();
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void CheckAndUpdateICache(u32 pc, u32 line_count);
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// Memory access functions for the JIT - MSB is set on exception.
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u64 ReadMemoryByte(u32 address);
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@ -36,9 +31,6 @@ void UncheckedWriteMemoryByte(u32 address, u32 value);
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void UncheckedWriteMemoryHalfWord(u32 address, u32 value);
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void UncheckedWriteMemoryWord(u32 address, u32 value);
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void ResolveBranch(CodeBlock* block, void* host_pc, void* host_resolve_pc, u32 host_pc_size);
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void LogPC(u32 pc);
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} // namespace Recompiler::Thunks
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} // namespace CPU
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} // namespace CPU::Recompiler::Thunks
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