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SIO: Convert to namespace

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This commit is contained in:
Connor McLaughlin
2023-01-11 19:03:07 +10:00
parent 0683b9fa0e
commit 835834f8f4
4 changed files with 91 additions and 102 deletions
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100
src/core/sio.cpp
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@ -2,18 +2,72 @@
// SPDX-License-Identifier: (GPL-3.0 OR CC-BY-NC-ND-4.0)
#include "sio.h"
#include "common/bitfield.h"
#include "common/fifo_queue.h"
#include "common/log.h"
#include "controller.h"
#include "interrupt_controller.h"
#include "memory_card.h"
#include "util/state_wrapper.h"
#include <array>
#include <memory>
Log_SetChannel(SIO);
SIO g_sio;
namespace SIO {
SIO::SIO() = default;
union SIO_CTRL
{
u16 bits;
SIO::~SIO() = default;
BitField<u16, bool, 0, 1> TXEN;
BitField<u16, bool, 1, 1> DTROUTPUT;
BitField<u16, bool, 2, 1> RXEN;
BitField<u16, bool, 3, 1> TXOUTPUT;
BitField<u16, bool, 4, 1> ACK;
BitField<u16, bool, 5, 1> RTSOUTPUT;
BitField<u16, bool, 6, 1> RESET;
BitField<u16, u8, 8, 2> RXIMODE;
BitField<u16, bool, 10, 1> TXINTEN;
BitField<u16, bool, 11, 1> RXINTEN;
BitField<u16, bool, 12, 1> ACKINTEN;
};
union SIO_STAT
{
u32 bits;
BitField<u32, bool, 0, 1> TXRDY;
BitField<u32, bool, 1, 1> RXFIFONEMPTY;
BitField<u32, bool, 2, 1> TXDONE;
BitField<u32, bool, 3, 1> RXPARITY;
BitField<u32, bool, 4, 1> RXFIFOOVERRUN;
BitField<u32, bool, 5, 1> RXBADSTOPBIT;
BitField<u32, bool, 6, 1> RXINPUTLEVEL;
BitField<u32, bool, 7, 1> DSRINPUTLEVEL;
BitField<u32, bool, 8, 1> CTSINPUTLEVEL;
BitField<u32, bool, 9, 1> INTR;
BitField<u32, u32, 11, 15> TMR;
};
union SIO_MODE
{
u16 bits;
BitField<u16, u8, 0, 2> reload_factor;
BitField<u16, u8, 2, 2> character_length;
BitField<u16, bool, 4, 1> parity_enable;
BitField<u16, u8, 5, 1> parity_type;
BitField<u16, u8, 6, 2> stop_bit_length;
};
static void SoftReset();
static SIO_CTRL s_SIO_CTRL = {};
static SIO_STAT s_SIO_STAT = {};
static SIO_MODE s_SIO_MODE = {};
static u16 s_SIO_BAUD = 0;
} // namespace SIO
void SIO::Initialize()
{
@ -29,10 +83,10 @@ void SIO::Reset()
bool SIO::DoState(StateWrapper& sw)
{
sw.Do(&m_SIO_CTRL.bits);
sw.Do(&m_SIO_STAT.bits);
sw.Do(&m_SIO_MODE.bits);
sw.Do(&m_SIO_BAUD);
sw.Do(&s_SIO_CTRL.bits);
sw.Do(&s_SIO_STAT.bits);
sw.Do(&s_SIO_MODE.bits);
sw.Do(&s_SIO_BAUD);
return !sw.HasError();
}
@ -52,18 +106,18 @@ u32 SIO::ReadRegister(u32 offset)
case 0x04: // SIO_STAT
{
const u32 bits = m_SIO_STAT.bits;
const u32 bits = s_SIO_STAT.bits;
return bits;
}
case 0x08: // SIO_MODE
return ZeroExtend32(m_SIO_MODE.bits);
return ZeroExtend32(s_SIO_MODE.bits);
case 0x0A: // SIO_CTRL
return ZeroExtend32(m_SIO_CTRL.bits);
return ZeroExtend32(s_SIO_CTRL.bits);
case 0x0E: // SIO_BAUD
return ZeroExtend32(m_SIO_BAUD);
return ZeroExtend32(s_SIO_BAUD);
default:
Log_ErrorPrintf("Unknown register read: 0x%X", offset);
@ -85,8 +139,8 @@ void SIO::WriteRegister(u32 offset, u32 value)
{
Log_DebugPrintf("SIO_CTRL <- 0x%04X", value);
m_SIO_CTRL.bits = Truncate16(value);
if (m_SIO_CTRL.RESET)
s_SIO_CTRL.bits = Truncate16(value);
if (s_SIO_CTRL.RESET)
SoftReset();
return;
@ -95,14 +149,14 @@ void SIO::WriteRegister(u32 offset, u32 value)
case 0x08: // SIO_MODE
{
Log_DebugPrintf("SIO_MODE <- 0x%08X", value);
m_SIO_MODE.bits = Truncate16(value);
s_SIO_MODE.bits = Truncate16(value);
return;
}
case 0x0E:
{
Log_DebugPrintf("SIO_BAUD <- 0x%08X", value);
m_SIO_BAUD = Truncate16(value);
s_SIO_BAUD = Truncate16(value);
return;
}
@ -114,12 +168,12 @@ void SIO::WriteRegister(u32 offset, u32 value)
void SIO::SoftReset()
{
m_SIO_CTRL.bits = 0;
m_SIO_STAT.bits = 0;
m_SIO_STAT.DSRINPUTLEVEL = true;
m_SIO_STAT.CTSINPUTLEVEL = true;
m_SIO_STAT.TXDONE = true;
m_SIO_STAT.TXRDY = true;
m_SIO_MODE.bits = 0;
m_SIO_BAUD = 0xDC;
s_SIO_CTRL.bits = 0;
s_SIO_STAT.bits = 0;
s_SIO_STAT.DSRINPUTLEVEL = true;
s_SIO_STAT.CTSINPUTLEVEL = true;
s_SIO_STAT.TXDONE = true;
s_SIO_STAT.TXRDY = true;
s_SIO_MODE.bits = 0;
s_SIO_BAUD = 0xDC;
}