DMA: Refactoring, support split block transfers
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@@ -35,8 +35,8 @@ public:
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DMA();
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~DMA();
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bool Initialize(System* system, Bus* bus, InterruptController* interrupt_controller, GPU* gpu, CDROM* cdrom,
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SPU* spu, MDEC* mdec);
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bool Initialize(System* system, Bus* bus, InterruptController* interrupt_controller, GPU* gpu, CDROM* cdrom, SPU* spu,
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MDEC* mdec);
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void Reset();
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bool DoState(StateWrapper& sw);
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@@ -45,8 +45,6 @@ public:
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void SetRequest(Channel channel, bool request);
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void Execute(TickCount ticks);
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private:
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static constexpr PhysicalMemoryAddress ADDRESS_MASK = UINT32_C(0x00FFFFFF);
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static constexpr u32 TRANSFER_TICKS = 10;
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@@ -60,10 +58,11 @@ private:
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};
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// is everything enabled for a channel to operate?
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bool CanRunChannel(Channel channel) const;
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bool CanTransferChannel(Channel channel) const;
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bool CanRunAnyChannels() const;
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void RunDMA(Channel channel);
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void Transfer();
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void TransferChannel(Channel channel);
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// from device -> memory
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u32 DMARead(Channel channel, PhysicalMemoryAddress dst_address, u32 remaining_words);
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@@ -71,8 +70,6 @@ private:
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// from memory -> device
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void DMAWrite(Channel channel, u32 value, PhysicalMemoryAddress src_address, u32 remaining_words);
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void UpdateTransferPending();
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System* m_system = nullptr;
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Bus* m_bus = nullptr;
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InterruptController* m_interrupt_controller = nullptr;
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@@ -82,7 +79,7 @@ private:
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MDEC* m_mdec = nullptr;
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TickCount m_transfer_ticks = 0;
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bool m_transfer_pending = false;
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bool m_transfer_in_progress = false;
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struct ChannelState
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{
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