DMA: Refactoring, support split block transfers

This commit is contained in:
Connor McLaughlin
2019-10-13 14:16:49 +10:00
parent 2d9d999713
commit 88ec178380
7 changed files with 169 additions and 106 deletions

View File

@@ -35,8 +35,8 @@ public:
DMA();
~DMA();
bool Initialize(System* system, Bus* bus, InterruptController* interrupt_controller, GPU* gpu, CDROM* cdrom,
SPU* spu, MDEC* mdec);
bool Initialize(System* system, Bus* bus, InterruptController* interrupt_controller, GPU* gpu, CDROM* cdrom, SPU* spu,
MDEC* mdec);
void Reset();
bool DoState(StateWrapper& sw);
@@ -45,8 +45,6 @@ public:
void SetRequest(Channel channel, bool request);
void Execute(TickCount ticks);
private:
static constexpr PhysicalMemoryAddress ADDRESS_MASK = UINT32_C(0x00FFFFFF);
static constexpr u32 TRANSFER_TICKS = 10;
@@ -60,10 +58,11 @@ private:
};
// is everything enabled for a channel to operate?
bool CanRunChannel(Channel channel) const;
bool CanTransferChannel(Channel channel) const;
bool CanRunAnyChannels() const;
void RunDMA(Channel channel);
void Transfer();
void TransferChannel(Channel channel);
// from device -> memory
u32 DMARead(Channel channel, PhysicalMemoryAddress dst_address, u32 remaining_words);
@@ -71,8 +70,6 @@ private:
// from memory -> device
void DMAWrite(Channel channel, u32 value, PhysicalMemoryAddress src_address, u32 remaining_words);
void UpdateTransferPending();
System* m_system = nullptr;
Bus* m_bus = nullptr;
InterruptController* m_interrupt_controller = nullptr;
@@ -82,7 +79,7 @@ private:
MDEC* m_mdec = nullptr;
TickCount m_transfer_ticks = 0;
bool m_transfer_pending = false;
bool m_transfer_in_progress = false;
struct ChannelState
{