Compile fixes for GCC
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@ -205,7 +205,7 @@ void SPU::WriteRegister(u32 offset, u16 value)
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{
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Log_DebugPrintf("SPU control register <- 0x%04X", ZeroExtend32(value));
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m_SPUCNT.bits = value;
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m_SPUSTAT.mode = m_SPUCNT.mode;
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m_SPUSTAT.mode = m_SPUCNT.mode.GetValue();
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m_SPUSTAT.dma_read_write_request = m_SPUCNT.ram_transfer_mode >= RAMTransferMode::DMAWrite;
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if (!m_SPUCNT.irq9_enable)
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