CPU/Recompiler: Use register cache for managing pc
Reduces the number of loadstores after each instruction.
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@ -28,6 +28,8 @@ union CodeBlockKey
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ALWAYS_INLINE u32 GetPC() const { return aligned_pc << 2; }
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ALWAYS_INLINE void SetPC(u32 pc) { aligned_pc = pc >> 2; }
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ALWAYS_INLINE u32 GetPCPhysicalAddress() const { return (aligned_pc << 2) & PHYSICAL_MEMORY_ADDRESS_MASK; }
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ALWAYS_INLINE CodeBlockKey& operator=(const CodeBlockKey& rhs)
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{
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bits = rhs.bits;
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@ -72,12 +74,15 @@ struct CodeBlock
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const u32 GetPC() const { return key.GetPC(); }
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const u32 GetSizeInBytes() const { return static_cast<u32>(instructions.size()) * sizeof(Instruction); }
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const u32 GetStartPageIndex() const { return (key.GetPC() / CPU_CODE_CACHE_PAGE_SIZE); }
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const u32 GetEndPageIndex() const { return ((key.GetPC() + GetSizeInBytes()) / CPU_CODE_CACHE_PAGE_SIZE); }
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const u32 GetStartPageIndex() const { return (key.GetPCPhysicalAddress() / CPU_CODE_CACHE_PAGE_SIZE); }
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const u32 GetEndPageIndex() const
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{
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return ((key.GetPCPhysicalAddress() + GetSizeInBytes()) / CPU_CODE_CACHE_PAGE_SIZE);
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}
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bool IsInRAM() const
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{
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// TODO: Constant
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return key.GetPC() < 0x200000;
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return key.GetPCPhysicalAddress() < 0x200000;
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}
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};
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