CPU/NewRec: Allocate callee-saved before flush in lwx/swx
It might move a callee-saved -> caller-saved reg, in which case it's going to get clobbered when the loadstore function is called. SaGa Frontier 2 with PGXP on x64.
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@ -1555,6 +1555,8 @@ void CPU::NewRec::AArch64Compiler::Compile_lwx(CompileFlags cf, MemoryAccessSize
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const std::optional<VirtualMemoryAddress>& address)
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{
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DebugAssert(size == MemoryAccessSize::Word && !sign);
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const WRegister addr = WRegister(AllocateTempHostReg(HR_CALLEE_SAVED));
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FlushForLoadStore(address, false, use_fastmem);
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// TODO: if address is constant, this can be simplified..
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@ -1564,7 +1566,6 @@ void CPU::NewRec::AArch64Compiler::Compile_lwx(CompileFlags cf, MemoryAccessSize
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UpdateLoadDelay();
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// We'd need to be careful here if we weren't overwriting it..
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const WRegister addr = WRegister(AllocateHostReg(HR_CALLEE_SAVED, HR_TYPE_TEMP));
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ComputeLoadStoreAddressArg(cf, address, addr);
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armAsm->and_(RWARG1, addr, armCheckLogicalConstant(~0x3u));
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GenerateLoad(RWARG1, MemoryAccessSize::Word, false, use_fastmem, []() { return RWRET; });
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@ -1747,11 +1748,12 @@ void CPU::NewRec::AArch64Compiler::Compile_swx(CompileFlags cf, MemoryAccessSize
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const std::optional<VirtualMemoryAddress>& address)
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{
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DebugAssert(size == MemoryAccessSize::Word && !sign);
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const WRegister addr = WRegister(AllocateTempHostReg(HR_CALLEE_SAVED));
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FlushForLoadStore(address, true, use_fastmem);
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// TODO: if address is constant, this can be simplified..
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// We'd need to be careful here if we weren't overwriting it..
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const WRegister addr = WRegister(AllocateHostReg(HR_CALLEE_SAVED, HR_TYPE_TEMP));
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ComputeLoadStoreAddressArg(cf, address, addr);
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armAsm->and_(RWARG1, addr, armCheckLogicalConstant(~0x3u));
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GenerateLoad(RWARG1, MemoryAccessSize::Word, false, use_fastmem, []() { return RWRET; });
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