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Common: Move CPU macros to types.h

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This commit is contained in:
Stenzek
2023-10-01 13:57:25 +10:00
parent dd204d116e
commit b1bb33a566
18 changed files with 135 additions and 142 deletions
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7
src/util/audio_stream.cpp
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@ -7,7 +7,6 @@
#include "common/assert.h"
#include "common/log.h"
#include "common/make_array.h"
#include "common/platform.h"
#include "common/timer.h"
#include <algorithm>
#include <cmath>
@ -23,7 +22,7 @@
#include <arm64_neon.h>
#elif defined(__aarch64__)
#include <arm_neon.h>
#elif defined(CPU_X86) || defined(CPU_X64)
#elif defined(CPU_ARCH_X86) || defined(CPU_ARCH_X64)
#include <emmintrin.h>
#endif
@ -365,7 +364,7 @@ void AudioStream::EndWrite(u32 num_frames)
static constexpr float S16_TO_FLOAT = 1.0f / 32767.0f;
static constexpr float FLOAT_TO_S16 = 32767.0f;
#if defined(CPU_AARCH64)
#if defined(CPU_ARCH_ARM64)
static void S16ChunkToFloat(const s32* src, float* dst)
{
@ -418,7 +417,7 @@ static void FloatChunkToS16(s32* dst, const float* src, uint size)
}
}
#elif defined(CPU_X86) || defined(CPU_X64)
#elif defined(CPU_ARCH_X86) || defined(CPU_ARCH_X64)
static void S16ChunkToFloat(const s32* src, float* dst)
{

5
src/util/cd_image_chd.cpp
View File

@ -11,7 +11,6 @@
#include "common/hash_combine.h"
#include "common/log.h"
#include "common/path.h"
#include "common/platform.h"
#include "common/string_util.h"
#include "fmt/format.h"
@ -448,7 +447,7 @@ bool CDImageCHD::IsPrecached() const
ALWAYS_INLINE static void CopyAndSwap(void* dst_ptr, const u8* src_ptr, u32 data_size)
{
u8* dst_ptr_byte = static_cast<u8*>(dst_ptr);
#if defined(CPU_X64) || defined(CPU_AARCH64)
#if defined(CPU_ARCH_X64) || defined(CPU_ARCH_ARM64)
const u32 num_values = data_size / 8;
for (u32 i = 0; i < num_values; i++)
{
@ -459,7 +458,7 @@ ALWAYS_INLINE static void CopyAndSwap(void* dst_ptr, const u8* src_ptr, u32 data
src_ptr += sizeof(value);
dst_ptr_byte += sizeof(value);
}
#elif defined(CPU_X86) || defined(CPU_ARM)
#elif defined(CPU_ARCH_X86) || defined(CPU_ARCH_ARM32)
const u32 num_values = data_size / 4;
for (u32 i = 0; i < num_values; i++)
{

5
src/util/jit_code_buffer.cpp
View File

@ -5,7 +5,6 @@
#include "common/align.h"
#include "common/assert.h"
#include "common/log.h"
#include "common/platform.h"
#include <algorithm>
Log_SetChannel(JitCodeBuffer);
@ -209,7 +208,7 @@ void JitCodeBuffer::CommitCode(u32 length)
if (length == 0)
return;
#if defined(CPU_AARCH32) || defined(CPU_AARCH64) || defined(CPU_RISCV64)
#if defined(CPU_ARCH_ARM32) || defined(CPU_ARCH_ARM64) || defined(CPU_ARCH_RISCV64)
// ARM instruction and data caches are not coherent, we need to flush after every block.
FlushInstructionCache(m_free_code_ptr, length);
#endif
@ -224,7 +223,7 @@ void JitCodeBuffer::CommitFarCode(u32 length)
if (length == 0)
return;
#if defined(CPU_AARCH32) || defined(CPU_AARCH64) || defined(CPU_RISCV64)
#if defined(CPU_ARCH_ARM32) || defined(CPU_ARCH_ARM64) || defined(CPU_ARCH_RISCV64)
// ARM instruction and data caches are not coherent, we need to flush after every block.
FlushInstructionCache(m_free_far_code_ptr, length);
#endif

29
src/util/page_fault_handler.cpp
View File

@ -3,7 +3,6 @@
#include "page_fault_handler.h"
#include "common/log.h"
#include "common/platform.h"
#include <algorithm>
#include <cstring>
#include <mutex>
@ -36,7 +35,7 @@ static std::vector<RegisteredHandler> m_handlers;
static std::mutex m_handler_lock;
static thread_local bool s_in_handler;
#if defined(CPU_AARCH32)
#if defined(CPU_ARCH_ARM32)
static bool IsStoreInstruction(const void* ptr)
{
u32 bits;
@ -46,7 +45,7 @@ static bool IsStoreInstruction(const void* ptr)
return false;
}
#elif defined(CPU_AARCH64)
#elif defined(CPU_ARCH_ARM64)
static bool IsStoreInstruction(const void* ptr)
{
u32 bits;
@ -81,7 +80,7 @@ static bool IsStoreInstruction(const void* ptr)
return false;
}
}
#elif defined(CPU_RISCV64)
#elif defined(CPU_ARCH_RISCV64)
static bool IsStoreInstruction(const void* ptr)
{
u32 bits;
@ -91,7 +90,7 @@ static bool IsStoreInstruction(const void* ptr)
}
#endif
#if defined(_WIN32) && (defined(CPU_X64) || defined(CPU_AARCH64))
#if defined(_WIN32) && (defined(CPU_ARCH_X64) || defined(CPU_ARCH_ARM64))
static PVOID s_veh_handle;
static LONG ExceptionHandler(PEXCEPTION_POINTERS exi)
@ -142,16 +141,16 @@ static void SIGSEGVHandler(int sig, siginfo_t* info, void* ctx)
#if defined(__linux__) || defined(__ANDROID__)
void* const exception_address = reinterpret_cast<void*>(info->si_addr);
#if defined(CPU_X64)
#if defined(CPU_ARCH_X64)
void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext.gregs[REG_RIP]);
const bool is_write = (static_cast<ucontext_t*>(ctx)->uc_mcontext.gregs[REG_ERR] & 2) != 0;
#elif defined(CPU_AARCH32)
#elif defined(CPU_ARCH_ARM32)
void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext.arm_pc);
const bool is_write = IsStoreInstruction(exception_pc);
#elif defined(CPU_AARCH64)
#elif defined(CPU_ARCH_ARM64)
void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext.pc);
const bool is_write = IsStoreInstruction(exception_pc);
#elif defined(CPU_RISCV64)
#elif defined(CPU_ARCH_RISCV64)
void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext.__gregs[REG_PC]);
const bool is_write = IsStoreInstruction(exception_pc);
#else
@ -161,12 +160,12 @@ static void SIGSEGVHandler(int sig, siginfo_t* info, void* ctx)
#elif defined(__APPLE__)
#if defined(CPU_X64)
#if defined(CPU_ARCH_X64)
void* const exception_address =
reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext->__es.__faultvaddr);
void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext->__ss.__rip);
const bool is_write = (static_cast<ucontext_t*>(ctx)->uc_mcontext->__es.__err & 2) != 0;
#elif defined(CPU_AARCH64)
#elif defined(CPU_ARCH_ARM64)
void* const exception_address = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext->__es.__far);
void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext->__ss.__pc);
const bool is_write = IsStoreInstruction(exception_pc);
@ -178,11 +177,11 @@ static void SIGSEGVHandler(int sig, siginfo_t* info, void* ctx)
#elif defined(__FreeBSD__)
#if defined(CPU_X64)
#if defined(CPU_ARCH_X64)
void* const exception_address = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext.mc_addr);
void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext.mc_rip);
const bool is_write = (static_cast<ucontext_t*>(ctx)->uc_mcontext.mc_err & 2) != 0;
#elif defined(CPU_AARCH64)
#elif defined(CPU_ARCH_ARM64)
void* const exception_address = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext->__es.__far);
void* const exception_pc = reinterpret_cast<void*>(static_cast<ucontext_t*>(ctx)->uc_mcontext->__ss.__pc);
const bool is_write = IsStoreInstruction(exception_pc);
@ -238,7 +237,7 @@ bool InstallHandler(const void* owner, void* start_pc, u32 code_size, Callback c
if (was_empty)
{
#if defined(_WIN32) && (defined(CPU_X64) || defined(CPU_AARCH64))
#if defined(_WIN32) && (defined(CPU_ARCH_X64) || defined(CPU_ARCH_ARM64))
s_veh_handle = AddVectoredExceptionHandler(1, ExceptionHandler);
if (!s_veh_handle)
{
@ -284,7 +283,7 @@ bool RemoveHandler(const void* owner)
if (m_handlers.empty())
{
#if defined(_WIN32) && (defined(CPU_X64) || defined(CPU_AARCH64))
#if defined(_WIN32) && (defined(CPU_ARCH_X64) || defined(CPU_ARCH_ARM64))
RemoveVectoredExceptionHandler(s_veh_handle);
s_veh_handle = nullptr;
#elif defined(USE_SIGSEGV)