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CPU/Recompiler: Reduced forced PC flushes

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This commit is contained in:
Connor McLaughlin
2019-12-28 14:04:15 +10:00
parent 620284f7d1
commit d118377c9e
7 changed files with 174 additions and 67 deletions
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79
src/core/cpu_recompiler_thunks.cpp
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@ -1,11 +1,24 @@
#include "cpu_recompiler_thunks.h"
#include "cpu_code_cache.h"
#include "cpu_core.h"
namespace CPU::Recompiler {
u32 Thunks::MakeRaiseExceptionInfo(Exception excode, const CodeBlockInstruction& cbi)
{
RaiseExceptionInfo ri = {};
ri.excode = static_cast<u8>(excode);
ri.BD = cbi.is_branch_delay_slot;
ri.CE = cbi.instruction.cop.cop_n;
return ri.bits;
}
// TODO: Port thunks to "ASM routines", i.e. code in the jit buffer.
u64 Thunks::ReadMemoryByte(Core* cpu, u32 address)
u64 Thunks::ReadMemoryByte(Core* cpu, u32 pc, u32 address)
{
cpu->m_current_instruction_pc = pc;
u32 temp = 0;
const TickCount cycles = cpu->DoMemoryAccess<MemoryAccessType::Read, MemoryAccessSize::Byte>(address, temp);
if (cycles < 0)
@ -18,8 +31,10 @@ u64 Thunks::ReadMemoryByte(Core* cpu, u32 address)
return ZeroExtend64(temp);
}
u64 Thunks::ReadMemoryHalfWord(Core* cpu, u32 address)
u64 Thunks::ReadMemoryHalfWord(Core* cpu, u32 pc, u32 address)
{
cpu->m_current_instruction_pc = pc;
if (!cpu->DoAlignmentCheck<MemoryAccessType::Read, MemoryAccessSize::HalfWord>(address))
return UINT64_C(0xFFFFFFFFFFFFFFFF);
@ -35,8 +50,10 @@ u64 Thunks::ReadMemoryHalfWord(Core* cpu, u32 address)
return ZeroExtend64(temp);
}
u64 Thunks::ReadMemoryWord(Core* cpu, u32 address)
u64 Thunks::ReadMemoryWord(Core* cpu, u32 pc, u32 address)
{
cpu->m_current_instruction_pc = pc;
if (!cpu->DoAlignmentCheck<MemoryAccessType::Read, MemoryAccessSize::Word>(address))
return UINT64_C(0xFFFFFFFFFFFFFFFF);
@ -52,19 +69,57 @@ u64 Thunks::ReadMemoryWord(Core* cpu, u32 address)
return ZeroExtend64(temp);
}
bool Thunks::WriteMemoryByte(Core* cpu, u32 address, u8 value)
bool Thunks::WriteMemoryByte(Core* cpu, u32 pc, u32 address, u8 value)
{
return cpu->WriteMemoryByte(address, value);
cpu->m_current_instruction_pc = pc;
u32 temp = ZeroExtend32(value);
const TickCount cycles = cpu->DoMemoryAccess<MemoryAccessType::Write, MemoryAccessSize::Byte>(address, temp);
if (cycles < 0)
{
cpu->RaiseException(Exception::DBE);
return false;
}
DebugAssert(cycles == 0);
return true;
}
bool Thunks::WriteMemoryHalfWord(Core* cpu, u32 address, u16 value)
bool Thunks::WriteMemoryHalfWord(Core* cpu, u32 pc, u32 address, u16 value)
{
return cpu->WriteMemoryHalfWord(address, value);
cpu->m_current_instruction_pc = pc;
if (!cpu->DoAlignmentCheck<MemoryAccessType::Write, MemoryAccessSize::HalfWord>(address))
return false;
u32 temp = ZeroExtend32(value);
const TickCount cycles = cpu->DoMemoryAccess<MemoryAccessType::Write, MemoryAccessSize::HalfWord>(address, temp);
if (cycles < 0)
{
cpu->RaiseException(Exception::DBE);
return false;
}
DebugAssert(cycles == 0);
return true;
}
bool Thunks::WriteMemoryWord(Core* cpu, u32 address, u32 value)
bool Thunks::WriteMemoryWord(Core* cpu, u32 pc, u32 address, u32 value)
{
return cpu->WriteMemoryWord(address, value);
cpu->m_current_instruction_pc = pc;
if (!cpu->DoAlignmentCheck<MemoryAccessType::Write, MemoryAccessSize::Word>(address))
return false;
const TickCount cycles = cpu->DoMemoryAccess<MemoryAccessType::Write, MemoryAccessSize::Word>(address, value);
if (cycles < 0)
{
cpu->RaiseException(Exception::DBE);
return false;
}
DebugAssert(cycles == 0);
return true;
}
bool Thunks::InterpretInstruction(Core* cpu)
@ -78,9 +133,11 @@ void Thunks::UpdateLoadDelay(Core* cpu)
cpu->UpdateLoadDelay();
}
void Thunks::RaiseException(Core* cpu, u8 excode)
void Thunks::RaiseException(Core* cpu, u32 epc, u32 ri_bits)
{
cpu->RaiseException(static_cast<Exception>(excode));
const RaiseExceptionInfo ri{ri_bits};
cpu->RaiseException(static_cast<Exception>(ri.excode), epc, ri.BD, cpu->m_current_instruction_was_branch_taken,
ri.CE);
}
void Thunks::RaiseAddressException(Core* cpu, u32 address, bool store, bool branch)