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Dep: Update vixl to 662828c

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This commit is contained in:
Stenzek
2024-06-14 17:27:12 +10:00
parent d45e218da7
commit f0c2832d03
66 changed files with 65453 additions and 10345 deletions
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6
dep/vixl/include/vixl/aarch32/assembler-aarch32.h
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@@ -27,10 +27,10 @@
#ifndef VIXL_AARCH32_ASSEMBLER_AARCH32_H_
#define VIXL_AARCH32_ASSEMBLER_AARCH32_H_
#include "../assembler-base-vixl.h"
#include "assembler-base-vixl.h"
#include "instructions-aarch32.h"
#include "location-aarch32.h"
#include "aarch32/instructions-aarch32.h"
#include "aarch32/location-aarch32.h"
namespace vixl {
namespace aarch32 {

2
dep/vixl/include/vixl/aarch32/constants-aarch32.h
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@@ -32,7 +32,7 @@ extern "C" {
#include <stdint.h>
}
#include "../globals-vixl.h"
#include "globals-vixl.h"
namespace vixl {

10
dep/vixl/include/vixl/aarch32/disasm-aarch32.h
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@@ -33,8 +33,14 @@ extern "C" {
#include <iomanip>
#include "constants-aarch32.h"
#include "operands-aarch32.h"
#include "aarch32/constants-aarch32.h"
#include "aarch32/operands-aarch32.h"
// Microsoft Visual C++ defines a `mvn` macro that conflicts with our own
// definition.
#if defined(_MSC_VER) && defined(mvn)
#undef mvn
#endif
namespace vixl {
namespace aarch32 {

17
dep/vixl/include/vixl/aarch32/instructions-aarch32.h
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@@ -34,13 +34,14 @@ extern "C" {
#include <algorithm>
#include <ostream>
#include "../code-buffer-vixl.h"
#include "../utils-vixl.h"
#include "code-buffer-vixl.h"
#include "utils-vixl.h"
#include "aarch32/constants-aarch32.h"
#include "constants-aarch32.h"
#ifdef __arm__
#if defined(__arm__) && !defined(__SOFTFP__)
#define HARDFLOAT __attribute__((noinline, pcs("aapcs-vfp")))
#elif defined(_MSC_VER)
#define HARDFLOAT __declspec(noinline)
#else
#define HARDFLOAT __attribute__((noinline))
#endif
@@ -492,6 +493,8 @@ class RegisterList {
}
Register GetFirstAvailableRegister() const;
bool IsEmpty() const { return list_ == 0; }
bool IsSingleRegister() const { return IsPowerOf2(list_); }
int GetCount() const { return CountSetBits(list_); }
static RegisterList Union(const RegisterList& list_1,
const RegisterList& list_2) {
return RegisterList(list_1.list_ | list_2.list_);
@@ -1039,7 +1042,9 @@ class Sign {
const char* GetName() const { return (IsPlus() ? "" : "-"); }
bool IsPlus() const { return sign_ == plus; }
bool IsMinus() const { return sign_ == minus; }
int32_t ApplyTo(uint32_t value) { return IsPlus() ? value : -value; }
int32_t ApplyTo(uint32_t value) {
return IsPlus() ? value : UnsignedNegate(value);
}
private:
SignType sign_;

12
dep/vixl/include/vixl/aarch32/location-aarch32.h
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@@ -36,9 +36,9 @@ extern "C" {
#include <iomanip>
#include <list>
#include "../invalset-vixl.h"
#include "../pool-manager.h"
#include "../utils-vixl.h"
#include "invalset-vixl.h"
#include "pool-manager.h"
#include "utils-vixl.h"
#include "constants-aarch32.h"
#include "instructions-aarch32.h"
@@ -58,12 +58,12 @@ class Location : public LocationBase<int32_t> {
// with the assembler methods for generating instructions, but will never
// be handled by the pool manager.
Location()
: LocationBase<int32_t>(kRawLocation, 1 /* dummy size*/),
: LocationBase<int32_t>(kRawLocation, 1 /* placeholder size*/),
referenced_(false) {}
typedef int32_t Offset;
~Location() {
~Location() VIXL_NEGATIVE_TESTING_ALLOW_EXCEPTION {
#ifdef VIXL_DEBUG
if (IsReferenced() && !IsBound()) {
VIXL_ABORT_WITH_MSG("Location, label or literal used but not bound.\n");
@@ -217,7 +217,7 @@ class Location : public LocationBase<int32_t> {
protected:
// Types passed to LocationBase. Must be distinct for unbound Locations (not
// relevant for bound locations, as they don't have a correspoding
// relevant for bound locations, as they don't have a corresponding
// PoolObject).
static const int kRawLocation = 0; // Will not be used by the pool manager.
static const int kVeneerType = 1;

99
dep/vixl/include/vixl/aarch32/macro-assembler-aarch32.h
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@@ -28,15 +28,15 @@
#ifndef VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
#define VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
#include "../code-generation-scopes-vixl.h"
#include "../macro-assembler-interface.h"
#include "../pool-manager-impl.h"
#include "../pool-manager.h"
#include "../utils-vixl.h"
#include "code-generation-scopes-vixl.h"
#include "macro-assembler-interface.h"
#include "pool-manager-impl.h"
#include "pool-manager.h"
#include "utils-vixl.h"
#include "assembler-aarch32.h"
#include "instructions-aarch32.h"
#include "operands-aarch32.h"
#include "aarch32/assembler-aarch32.h"
#include "aarch32/instructions-aarch32.h"
#include "aarch32/operands-aarch32.h"
namespace vixl {
@@ -268,7 +268,8 @@ class MacroAssembler : public Assembler, public MacroAssemblerInterface {
generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE),
pool_end_(NULL) {
#ifdef VIXL_DEBUG
SetAllowMacroInstructions(true);
SetAllowMacroInstructions( // NOLINT(clang-analyzer-optin.cplusplus.VirtualCall)
true);
#else
USE(allow_macro_instructions_);
#endif
@@ -283,7 +284,8 @@ class MacroAssembler : public Assembler, public MacroAssemblerInterface {
generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE),
pool_end_(NULL) {
#ifdef VIXL_DEBUG
SetAllowMacroInstructions(true);
SetAllowMacroInstructions( // NOLINT(clang-analyzer-optin.cplusplus.VirtualCall)
true);
#endif
}
MacroAssembler(byte* buffer, size_t size, InstructionSet isa = kDefaultISA)
@@ -296,7 +298,8 @@ class MacroAssembler : public Assembler, public MacroAssemblerInterface {
generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE),
pool_end_(NULL) {
#ifdef VIXL_DEBUG
SetAllowMacroInstructions(true);
SetAllowMacroInstructions( // NOLINT(clang-analyzer-optin.cplusplus.VirtualCall)
true);
#endif
}
@@ -399,13 +402,13 @@ class MacroAssembler : public Assembler, public MacroAssemblerInterface {
VIXL_ASSERT(GetBuffer()->Is32bitAligned());
}
// If we need to add padding, check if we have to emit the pool.
const int32_t pc = GetCursorOffset();
if (label->Needs16BitPadding(pc)) {
const int32_t cursor = GetCursorOffset();
if (label->Needs16BitPadding(cursor)) {
const int kPaddingBytes = 2;
if (pool_manager_.MustEmit(pc, kPaddingBytes)) {
int32_t new_pc = pool_manager_.Emit(this, pc, kPaddingBytes);
USE(new_pc);
VIXL_ASSERT(new_pc == GetCursorOffset());
if (pool_manager_.MustEmit(cursor, kPaddingBytes)) {
int32_t new_cursor = pool_manager_.Emit(this, cursor, kPaddingBytes);
USE(new_cursor);
VIXL_ASSERT(new_cursor == GetCursorOffset());
}
}
pool_manager_.Bind(this, label, GetCursorOffset());
@@ -427,30 +430,30 @@ class MacroAssembler : public Assembler, public MacroAssemblerInterface {
Location* location,
Condition* cond = NULL) {
int size = info->size;
int32_t pc = GetCursorOffset();
int32_t cursor = GetCursorOffset();
// If we need to emit a branch over the instruction, take this into account.
if ((cond != NULL) && NeedBranch(cond)) {
size += kBranchSize;
pc += kBranchSize;
cursor += kBranchSize;
}
int32_t from = pc;
int32_t from = cursor;
from += IsUsingT32() ? kT32PcDelta : kA32PcDelta;
if (info->pc_needs_aligning) from = AlignDown(from, 4);
int32_t min = from + info->min_offset;
int32_t max = from + info->max_offset;
ForwardReference<int32_t> temp_ref(pc,
ForwardReference<int32_t> temp_ref(cursor,
info->size,
min,
max,
info->alignment);
if (pool_manager_.MustEmit(GetCursorOffset(), size, &temp_ref, location)) {
int32_t new_pc = pool_manager_.Emit(this,
GetCursorOffset(),
info->size,
&temp_ref,
location);
USE(new_pc);
VIXL_ASSERT(new_pc == GetCursorOffset());
int32_t new_cursor = pool_manager_.Emit(this,
GetCursorOffset(),
info->size,
&temp_ref,
location);
USE(new_cursor);
VIXL_ASSERT(new_cursor == GetCursorOffset());
}
}
@@ -461,13 +464,13 @@ class MacroAssembler : public Assembler, public MacroAssemblerInterface {
// into account, as well as potential 16-bit padding needed to reach the
// minimum accessible location.
int alignment = literal->GetMaxAlignment();
int32_t pc = GetCursorOffset();
int total_size = AlignUp(pc, alignment) - pc + literal->GetSize();
if (literal->Needs16BitPadding(pc)) total_size += 2;
if (pool_manager_.MustEmit(pc, total_size)) {
int32_t new_pc = pool_manager_.Emit(this, pc, total_size);
USE(new_pc);
VIXL_ASSERT(new_pc == GetCursorOffset());
int32_t cursor = GetCursorOffset();
int total_size = AlignUp(cursor, alignment) - cursor + literal->GetSize();
if (literal->Needs16BitPadding(cursor)) total_size += 2;
if (pool_manager_.MustEmit(cursor, total_size)) {
int32_t new_cursor = pool_manager_.Emit(this, cursor, total_size);
USE(new_cursor);
VIXL_ASSERT(new_cursor == GetCursorOffset());
}
pool_manager_.Bind(this, literal, GetCursorOffset());
literal->EmitPoolObject(this);
@@ -2894,7 +2897,12 @@ class MacroAssembler : public Assembler, public MacroAssemblerInterface {
VIXL_ASSERT(OutsideITBlock());
MacroEmissionCheckScope guard(this);
ITScope it_scope(this, &cond, guard);
pop(cond, registers);
if (registers.IsSingleRegister() &&
(!IsUsingT32() || !registers.IsR0toR7orPC())) {
pop(cond, registers.GetFirstAvailableRegister());
} else if (!registers.IsEmpty()) {
pop(cond, registers);
}
}
void Pop(RegisterList registers) { Pop(al, registers); }
@@ -2914,7 +2922,12 @@ class MacroAssembler : public Assembler, public MacroAssemblerInterface {
VIXL_ASSERT(OutsideITBlock());
MacroEmissionCheckScope guard(this);
ITScope it_scope(this, &cond, guard);
push(cond, registers);
if (registers.IsSingleRegister() && !registers.Includes(sp) &&
(!IsUsingT32() || !registers.IsR0toR7orLR())) {
push(cond, registers.GetFirstAvailableRegister());
} else if (!registers.IsEmpty()) {
push(cond, registers);
}
}
void Push(RegisterList registers) { Push(al, registers); }
@@ -2924,7 +2937,12 @@ class MacroAssembler : public Assembler, public MacroAssemblerInterface {
VIXL_ASSERT(OutsideITBlock());
MacroEmissionCheckScope guard(this);
ITScope it_scope(this, &cond, guard);
push(cond, rt);
if (IsUsingA32() && rt.IsSP()) {
// Only the A32 multiple-register form can push sp.
push(cond, RegisterList(rt));
} else {
push(cond, rt);
}
}
void Push(Register rt) { Push(al, rt); }
@@ -11170,10 +11188,11 @@ class UseScratchRegisterScope {
uint32_t old_available_; // kRRegister
uint64_t old_available_vfp_; // kVRegister
VIXL_DEBUG_NO_RETURN UseScratchRegisterScope(const UseScratchRegisterScope&) {
VIXL_NO_RETURN_IN_DEBUG_MODE UseScratchRegisterScope(
const UseScratchRegisterScope&) {
VIXL_UNREACHABLE();
}
VIXL_DEBUG_NO_RETURN void operator=(const UseScratchRegisterScope&) {
VIXL_NO_RETURN_IN_DEBUG_MODE void operator=(const UseScratchRegisterScope&) {
VIXL_UNREACHABLE();
}
};

68
dep/vixl/include/vixl/aarch32/operands-aarch32.h
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@@ -28,7 +28,7 @@
#ifndef VIXL_AARCH32_OPERANDS_AARCH32_H_
#define VIXL_AARCH32_OPERANDS_AARCH32_H_
#include "instructions-aarch32.h"
#include "aarch32/instructions-aarch32.h"
namespace vixl {
namespace aarch32 {
@@ -54,28 +54,16 @@ class Operand {
// This is allowed to be an implicit constructor because Operand is
// a wrapper class that doesn't normally perform any type conversion.
Operand(uint32_t immediate) // NOLINT(runtime/explicit)
: imm_(immediate),
rm_(NoReg),
shift_(LSL),
amount_(0),
rs_(NoReg) {}
: imm_(immediate), rm_(NoReg), shift_(LSL), amount_(0), rs_(NoReg) {}
Operand(int32_t immediate) // NOLINT(runtime/explicit)
: imm_(immediate),
rm_(NoReg),
shift_(LSL),
amount_(0),
rs_(NoReg) {}
: imm_(immediate), rm_(NoReg), shift_(LSL), amount_(0), rs_(NoReg) {}
// rm
// where rm is the base register
// This is allowed to be an implicit constructor because Operand is
// a wrapper class that doesn't normally perform any type conversion.
Operand(Register rm) // NOLINT(runtime/explicit)
: imm_(0),
rm_(rm),
shift_(LSL),
amount_(0),
rs_(NoReg) {
: imm_(0), rm_(rm), shift_(LSL), amount_(0), rs_(NoReg) {
VIXL_ASSERT(rm_.IsValid());
}
@@ -202,7 +190,7 @@ class Operand {
}
private:
// Forbid implicitely creating operands around types that cannot be encoded
// Forbid implicitly creating operands around types that cannot be encoded
// into a uint32_t without loss.
#if __cplusplus >= 201103L
Operand(int64_t) = delete; // NOLINT(runtime/explicit)
@@ -245,22 +233,18 @@ class NeonImmediate {
// This is allowed to be an implicit constructor because NeonImmediate is
// a wrapper class that doesn't normally perform any type conversion.
NeonImmediate(uint32_t immediate) // NOLINT(runtime/explicit)
: imm_(immediate),
immediate_type_(I32) {}
: imm_(immediate), immediate_type_(I32) {}
NeonImmediate(int immediate) // NOLINT(runtime/explicit)
: imm_(immediate),
immediate_type_(I32) {}
: imm_(immediate), immediate_type_(I32) {}
// { #<immediate> }
// where <immediate> is a 64 bit number
// This is allowed to be an implicit constructor because NeonImmediate is
// a wrapper class that doesn't normally perform any type conversion.
NeonImmediate(int64_t immediate) // NOLINT(runtime/explicit)
: imm_(immediate),
immediate_type_(I64) {}
: imm_(immediate), immediate_type_(I64) {}
NeonImmediate(uint64_t immediate) // NOLINT(runtime/explicit)
: imm_(immediate),
immediate_type_(I64) {}
: imm_(immediate), immediate_type_(I64) {}
// { #<immediate> }
// where <immediate> is a non zero floating point number which can be encoded
@@ -268,11 +252,9 @@ class NeonImmediate {
// This is allowed to be an implicit constructor because NeonImmediate is
// a wrapper class that doesn't normally perform any type conversion.
NeonImmediate(float immediate) // NOLINT(runtime/explicit)
: imm_(immediate),
immediate_type_(F32) {}
: imm_(immediate), immediate_type_(F32) {}
NeonImmediate(double immediate) // NOLINT(runtime/explicit)
: imm_(immediate),
immediate_type_(F64) {}
: imm_(immediate), immediate_type_(F64) {}
NeonImmediate(const NeonImmediate& src)
: imm_(src.imm_), immediate_type_(src.immediate_type_) {}
@@ -311,7 +293,7 @@ class NeonImmediate {
bool IsInteger32() const { return immediate_type_.Is(I32); }
bool IsInteger64() const { return immediate_type_.Is(I64); }
bool IsInteger() const { return IsInteger32() | IsInteger64(); }
bool IsInteger() const { return IsInteger32() || IsInteger64(); }
bool IsFloat() const { return immediate_type_.Is(F32); }
bool IsDouble() const { return immediate_type_.Is(F64); }
bool IsFloatZero() const {
@@ -374,29 +356,21 @@ std::ostream& operator<<(std::ostream& os, const NeonImmediate& operand);
class NeonOperand {
public:
NeonOperand(int32_t immediate) // NOLINT(runtime/explicit)
: imm_(immediate),
rm_(NoDReg) {}
: imm_(immediate), rm_(NoDReg) {}
NeonOperand(uint32_t immediate) // NOLINT(runtime/explicit)
: imm_(immediate),
rm_(NoDReg) {}
: imm_(immediate), rm_(NoDReg) {}
NeonOperand(int64_t immediate) // NOLINT(runtime/explicit)
: imm_(immediate),
rm_(NoDReg) {}
: imm_(immediate), rm_(NoDReg) {}
NeonOperand(uint64_t immediate) // NOLINT(runtime/explicit)
: imm_(immediate),
rm_(NoDReg) {}
: imm_(immediate), rm_(NoDReg) {}
NeonOperand(float immediate) // NOLINT(runtime/explicit)
: imm_(immediate),
rm_(NoDReg) {}
: imm_(immediate), rm_(NoDReg) {}
NeonOperand(double immediate) // NOLINT(runtime/explicit)
: imm_(immediate),
rm_(NoDReg) {}
: imm_(immediate), rm_(NoDReg) {}
NeonOperand(const NeonImmediate& imm) // NOLINT(runtime/explicit)
: imm_(imm),
rm_(NoDReg) {}
: imm_(imm), rm_(NoDReg) {}
NeonOperand(const VRegister& rm) // NOLINT(runtime/explicit)
: imm_(0),
rm_(rm) {
: imm_(0), rm_(rm) {
VIXL_ASSERT(rm_.IsValid());
}
@@ -641,7 +615,7 @@ class ImmediateVorn : public ImmediateVorr {
// - a shifted index register <Rm>, <shift> #<amount>
//
// The index register may have an associated {+/-} sign,
// which if ommitted, defaults to + .
// which if omitted, defaults to + .
//
// We have two constructors for the offset:
//