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CPU: Make interrupts actually edge-triggered

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This commit is contained in:
Stenzek
2024-03-16 23:28:53 +10:00
parent 3702a533f2
commit fa6850902a
13 changed files with 145 additions and 98 deletions
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63
src/core/interrupt_controller.cpp
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@ -1,54 +1,64 @@
// SPDX-FileCopyrightText: 2019-2022 Connor McLaughlin <stenzek@gmail.com>
// SPDX-FileCopyrightText: 2019-2024 Connor McLaughlin <stenzek@gmail.com>
// SPDX-License-Identifier: (GPL-3.0 OR CC-BY-NC-ND-4.0)
#include "interrupt_controller.h"
#include "common/log.h"
#include "cpu_core.h"
#include "util/state_wrapper.h"
#include "common/log.h"
Log_SetChannel(InterruptController);
namespace InterruptController {
static constexpr u32 REGISTER_WRITE_MASK = (u32(1) << NUM_IRQS) - 1;
static constexpr u32 DEFAULT_INTERRUPT_MASK = 0; //(u32(1) << NUM_IRQS) - 1;
static constexpr u32 DEFAULT_INTERRUPT_MASK = 0;
static void UpdateCPUInterruptRequest();
static u32 s_interrupt_status_register = 0;
static u32 s_interrupt_mask_register = DEFAULT_INTERRUPT_MASK;
static u32 s_interrupt_line_state = 0;
[[maybe_unused]] static constexpr std::array<const char*, static_cast<size_t>(IRQ::MaxCount)> s_irq_names = {
{"VBLANK", "GPU", "CDROM", "DMA", "TMR0", "TMR1", "TMR2", "PAD", "SIO", "SPU", "IRQ10"}};
} // namespace InterruptController
void InterruptController::Initialize()
{
Reset();
}
void InterruptController::Shutdown() {}
void InterruptController::Reset()
{
s_interrupt_status_register = 0;
s_interrupt_mask_register = DEFAULT_INTERRUPT_MASK;
s_interrupt_line_state = 0;
}
bool InterruptController::DoState(StateWrapper& sw)
{
sw.Do(&s_interrupt_status_register);
sw.Do(&s_interrupt_mask_register);
sw.DoEx(&s_interrupt_line_state, 63, s_interrupt_status_register);
return !sw.HasError();
}
bool InterruptController::GetIRQLineState()
void InterruptController::SetLineState(IRQ irq, bool state)
{
return (s_interrupt_status_register != 0);
}
// Interupts are edge-triggered, so only set the flag in the status register on a 0-1 transition.
const u32 bit = (1u << static_cast<u32>(irq));
const u32 prev_state = s_interrupt_line_state;
s_interrupt_line_state = (s_interrupt_line_state & ~bit) | (state ? bit : 0u);
if (s_interrupt_line_state == prev_state)
return;
void InterruptController::InterruptRequest(IRQ irq)
{
const u32 bit = (u32(1) << static_cast<u32>(irq));
s_interrupt_status_register |= bit;
#ifdef _DEBUG
if (!(prev_state & bit) && state)
Log_DebugFmt("{} IRQ triggered", s_irq_names[static_cast<size_t>(irq)]);
else if ((prev_state & bit) && !state)
Log_DebugFmt("{} IRQ line inactive", s_irq_names[static_cast<size_t>(irq)]);
#endif
s_interrupt_status_register |= (state ? (prev_state ^ s_interrupt_line_state) : 0u) & s_interrupt_line_state;
UpdateCPUInterruptRequest();
}
@ -74,8 +84,14 @@ void InterruptController::WriteRegister(u32 offset, u32 value)
{
case 0x00: // I_STATUS
{
if ((s_interrupt_status_register & ~value) != 0)
Log_DebugPrintf("Clearing bits 0x%08X", (s_interrupt_status_register & ~value));
#ifdef _DEBUG
const u32 cleared_bits = (s_interrupt_status_register & ~value);
for (u32 i = 0; i < static_cast<u32>(IRQ::MaxCount); i++)
{
if (cleared_bits & (1u << i))
Log_DebugFmt("{} IRQ cleared", s_irq_names[i]);
}
#endif
s_interrupt_status_register = s_interrupt_status_register & (value & REGISTER_WRITE_MASK);
UpdateCPUInterruptRequest();
@ -96,11 +112,8 @@ void InterruptController::WriteRegister(u32 offset, u32 value)
}
}
void InterruptController::UpdateCPUInterruptRequest()
ALWAYS_INLINE_RELEASE void InterruptController::UpdateCPUInterruptRequest()
{
// external interrupts set bit 10 only?
if ((s_interrupt_status_register & s_interrupt_mask_register) != 0)
CPU::SetExternalInterrupt(2);
else
CPU::ClearExternalInterrupt(2);
const bool state = (s_interrupt_status_register & s_interrupt_mask_register) != 0;
CPU::SetIRQRequest(state);
}