CPU: Make interrupts actually edge-triggered
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@ -1,4 +1,4 @@
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// SPDX-FileCopyrightText: 2019-2022 Connor McLaughlin <stenzek@gmail.com>
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// SPDX-FileCopyrightText: 2019-2024 Connor McLaughlin <stenzek@gmail.com>
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// SPDX-License-Identifier: (GPL-3.0 OR CC-BY-NC-ND-4.0)
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#pragma once
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@ -19,24 +19,19 @@ enum class IRQ : u32
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TMR0 = 4, // IRQ4 - TMR0 - Sysclk or Dotclk
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TMR1 = 5, // IRQ5 - TMR1 - Sysclk Hblank
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TMR2 = 6, // IRQ6 - TMR2 - Sysclk or Sysclk / 8
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IRQ7 = 7, // IRQ7 - Controller and Memory Card Byte Received
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PAD = 7, // IRQ7 - Controller and Memory Card Byte Received
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SIO = 8, // IRQ8 - SIO
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SPU = 9, // IRQ9 - SPU
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IRQ10 = 10 // IRQ10 - Lightpen interrupt, PIO
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IRQ10 = 10, // IRQ10 - Lightpen interrupt, PIO
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MaxCount
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};
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void Initialize();
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void Shutdown();
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void Reset();
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bool DoState(StateWrapper& sw);
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// Should mirror CPU state.
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bool GetIRQLineState();
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void SetLineState(IRQ irq, bool state);
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// Interupts are edge-triggered, so if it is masked when TriggerInterrupt() is called, it will be lost.
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void InterruptRequest(IRQ irq);
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// I/O
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u32 ReadRegister(u32 offset);
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void WriteRegister(u32 offset, u32 value);
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