affffca3da
The UI is intentionally left at 16x. Going too high **will** make you run out VRAM and your system will start acting strangely. But for those people who really want to do it, you can go 32x in Vulkan with the SDL frontend, or by setting it in the ini.
604 lines
19 KiB
C++
604 lines
19 KiB
C++
#pragma once
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#include "common/bitfield.h"
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#include "common/fifo_queue.h"
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#include "common/rectangle.h"
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#include "gpu_types.h"
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#include "timers.h"
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#include "types.h"
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#include <algorithm>
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#include <array>
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#include <deque>
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#include <memory>
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#include <tuple>
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#include <vector>
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class StateWrapper;
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class HostDisplay;
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class TimingEvent;
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class Timers;
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class GPU
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{
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public:
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enum class BlitterState : u8
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{
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Idle,
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ReadingVRAM,
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WritingVRAM,
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DrawingPolyLine
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};
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enum class DMADirection : u32
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{
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Off = 0,
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FIFO = 1,
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CPUtoGP0 = 2,
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GPUREADtoCPU = 3
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};
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enum : u32
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{
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MAX_FIFO_SIZE = 4096,
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DOT_TIMER_INDEX = 0,
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HBLANK_TIMER_INDEX = 1,
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MAX_RESOLUTION_SCALE = 32,
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};
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enum : u16
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{
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NTSC_TICKS_PER_LINE = 3413,
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NTSC_HSYNC_TICKS = 200,
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NTSC_TOTAL_LINES = 263,
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PAL_TICKS_PER_LINE = 3406,
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PAL_HSYNC_TICKS = 200, // actually one more on odd lines
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PAL_TOTAL_LINES = 314,
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};
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enum : u16
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{
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NTSC_HORIZONTAL_ACTIVE_START = 488,
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NTSC_HORIZONTAL_ACTIVE_END = 3288,
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NTSC_VERTICAL_ACTIVE_START = 16,
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NTSC_VERTICAL_ACTIVE_END = 256,
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PAL_HORIZONTAL_ACTIVE_START = 487,
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PAL_HORIZONTAL_ACTIVE_END = 3282,
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PAL_VERTICAL_ACTIVE_START = 20,
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PAL_VERTICAL_ACTIVE_END = 308,
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};
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// Base class constructor.
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GPU();
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virtual ~GPU();
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virtual bool IsHardwareRenderer() const = 0;
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virtual bool Initialize(HostDisplay* host_display);
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virtual void Reset();
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virtual bool DoState(StateWrapper& sw, bool update_display);
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// Graphics API state reset/restore - call when drawing the UI etc.
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virtual void ResetGraphicsAPIState();
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virtual void RestoreGraphicsAPIState();
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// Render statistics debug window.
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void DrawDebugStateWindow();
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void CPUClockChanged();
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// MMIO access
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u32 ReadRegister(u32 offset);
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void WriteRegister(u32 offset, u32 value);
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// DMA access
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void DMARead(u32* words, u32 word_count);
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ALWAYS_INLINE bool BeginDMAWrite() const { return (m_GPUSTAT.dma_direction == DMADirection::CPUtoGP0); }
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ALWAYS_INLINE void DMAWrite(u32 address, u32 value)
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{
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m_fifo.Push((ZeroExtend64(address) << 32) | ZeroExtend64(value));
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}
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void EndDMAWrite();
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/// Returns true if no data is being sent from VRAM to the DAC or that no portion of VRAM would be visible on screen.
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ALWAYS_INLINE bool IsDisplayDisabled() const
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{
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return m_GPUSTAT.display_disable || m_crtc_state.display_vram_width == 0 || m_crtc_state.display_vram_height == 0;
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}
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/// Returns true if scanout should be interlaced.
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ALWAYS_INLINE bool IsInterlacedDisplayEnabled() const
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{
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return (!m_force_progressive_scan) && m_GPUSTAT.vertical_interlace;
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}
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/// Returns true if interlaced rendering is enabled and force progressive scan is disabled.
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ALWAYS_INLINE bool IsInterlacedRenderingEnabled() const
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{
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return (!m_force_progressive_scan) && m_GPUSTAT.SkipDrawingToActiveField();
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}
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/// Returns the number of pending GPU ticks.
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TickCount GetPendingCRTCTicks() const;
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TickCount GetPendingCommandTicks() const;
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/// Returns true if enough ticks have passed for the raster to be on the next line.
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bool IsCRTCScanlinePending() const;
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/// Returns true if a raster scanline or command execution is pending.
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bool IsCommandCompletionPending() const;
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/// Synchronizes the CRTC, updating the hblank timer.
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void SynchronizeCRTC();
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/// Recompile shaders/recreate framebuffers when needed.
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virtual void UpdateSettings();
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/// Updates the resolution scale when it's set to automatic.
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virtual void UpdateResolutionScale();
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/// Returns the effective display resolution of the GPU.
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virtual std::tuple<u32, u32> GetEffectiveDisplayResolution();
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// gpu_hw_d3d11.cpp
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static std::unique_ptr<GPU> CreateHardwareD3D11Renderer();
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// gpu_hw_opengl.cpp
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static std::unique_ptr<GPU> CreateHardwareOpenGLRenderer();
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// gpu_hw_vulkan.cpp
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static std::unique_ptr<GPU> CreateHardwareVulkanRenderer();
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// gpu_sw.cpp
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static std::unique_ptr<GPU> CreateSoftwareRenderer();
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// Converts window coordinates into horizontal ticks and scanlines. Returns false if out of range. Used for lightguns.
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bool ConvertScreenCoordinatesToBeamTicksAndLines(s32 window_x, s32 window_y, float x_scale, u32* out_tick,
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u32* out_line) const;
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// Returns the video clock frequency.
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TickCount GetCRTCFrequency() const;
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protected:
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TickCount CRTCTicksToSystemTicks(TickCount crtc_ticks, TickCount fractional_ticks) const;
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TickCount SystemTicksToCRTCTicks(TickCount sysclk_ticks, TickCount* fractional_ticks) const;
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// The GPU internally appears to run at 2x the system clock.
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ALWAYS_INLINE static constexpr TickCount GPUTicksToSystemTicks(TickCount gpu_ticks)
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{
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return std::max<TickCount>((gpu_ticks + 1) >> 1, 1);
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}
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ALWAYS_INLINE static constexpr TickCount SystemTicksToGPUTicks(TickCount sysclk_ticks) { return sysclk_ticks << 1; }
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// Helper/format conversion functions.
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static constexpr u32 RGBA5551ToRGBA8888(u16 color)
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{
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u8 r = Truncate8(color & 31);
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u8 g = Truncate8((color >> 5) & 31);
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u8 b = Truncate8((color >> 10) & 31);
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u8 a = Truncate8((color >> 15) & 1);
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// 00012345 -> 1234545
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b = (b << 3) | (b & 0b111);
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g = (g << 3) | (g & 0b111);
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r = (r << 3) | (r & 0b111);
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a = a ? 255 : 0;
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return ZeroExtend32(r) | (ZeroExtend32(g) << 8) | (ZeroExtend32(b) << 16) | (ZeroExtend32(a) << 24);
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}
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static constexpr u16 RGBA8888ToRGBA5551(u32 color)
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{
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const u16 r = Truncate16((color >> 3) & 0x1Fu);
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const u16 g = Truncate16((color >> 11) & 0x1Fu);
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const u16 b = Truncate16((color >> 19) & 0x1Fu);
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const u16 a = Truncate16((color >> 31) & 0x01u);
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return r | (g << 5) | (b << 10) | (a << 15);
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}
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static constexpr std::tuple<u8, u8> UnpackTexcoord(u16 texcoord)
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{
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return std::make_tuple(static_cast<u8>(texcoord), static_cast<u8>(texcoord >> 8));
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}
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static constexpr std::tuple<u8, u8, u8> UnpackColorRGB24(u32 rgb24)
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{
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return std::make_tuple(static_cast<u8>(rgb24), static_cast<u8>(rgb24 >> 8), static_cast<u8>(rgb24 >> 16));
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}
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static bool DumpVRAMToFile(const char* filename, u32 width, u32 height, u32 stride, const void* buffer,
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bool remove_alpha);
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void SoftReset();
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// Sets dots per scanline
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float ComputeHorizontalFrequency() const;
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float ComputeVerticalFrequency() const;
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float GetDisplayAspectRatio() const;
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void UpdateCRTCConfig();
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void UpdateCRTCDisplayParameters();
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// Update ticks for this execution slice
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void UpdateCRTCTickEvent();
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void UpdateCommandTickEvent();
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// Updates dynamic bits in GPUSTAT (ready to send VRAM/ready to receive DMA)
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void UpdateDMARequest();
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void UpdateGPUIdle();
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// Ticks for hblank/vblank.
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void CRTCTickEvent(TickCount ticks);
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void CommandTickEvent(TickCount ticks);
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/// Returns 0 if the currently-displayed field is on odd lines (1,3,5,...) or 1 if even (2,4,6,...).
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ALWAYS_INLINE u32 GetInterlacedDisplayField() const { return ZeroExtend32(m_crtc_state.interlaced_field); }
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/// Returns 0 if the currently-displayed field is on an even line in VRAM, otherwise 1.
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ALWAYS_INLINE u32 GetActiveLineLSB() const { return ZeroExtend32(m_crtc_state.active_line_lsb); }
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/// Sets/decodes GP0(E1h) (set draw mode).
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void SetDrawMode(u16 bits);
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/// Sets/decodes polygon/rectangle texture palette value.
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void SetTexturePalette(u16 bits);
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/// Sets/decodes texture window bits.
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void SetTextureWindow(u32 value);
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u32 ReadGPUREAD();
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void FinishVRAMWrite();
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/// Returns the number of vertices in the buffered poly-line.
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ALWAYS_INLINE u32 GetPolyLineVertexCount() const
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{
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return (static_cast<u32>(m_blit_buffer.size()) + BoolToUInt32(m_render_command.shading_enable)) >>
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BoolToUInt8(m_render_command.shading_enable);
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}
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/// Returns true if the drawing area is valid (i.e. left <= right, top <= bottom).
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ALWAYS_INLINE bool IsDrawingAreaIsValid() const { return m_drawing_area.Valid(); }
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/// Clamps the specified coordinates to the drawing area.
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ALWAYS_INLINE void ClampCoordinatesToDrawingArea(s32* x, s32* y)
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{
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const s32 x_value = *x;
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if (x_value < static_cast<s32>(m_drawing_area.left))
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*x = m_drawing_area.left;
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else if (x_value >= static_cast<s32>(m_drawing_area.right))
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*x = m_drawing_area.right - 1;
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const s32 y_value = *y;
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if (y_value < static_cast<s32>(m_drawing_area.top))
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*y = m_drawing_area.top;
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else if (y_value >= static_cast<s32>(m_drawing_area.bottom))
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*y = m_drawing_area.bottom - 1;
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}
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void AddCommandTicks(TickCount ticks);
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void WriteGP1(u32 value);
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void EndCommand();
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void ExecuteCommands();
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void HandleGetGPUInfoCommand(u32 value);
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// Rendering in the backend
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virtual void ReadVRAM(u32 x, u32 y, u32 width, u32 height);
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virtual void FillVRAM(u32 x, u32 y, u32 width, u32 height, u32 color);
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virtual void UpdateVRAM(u32 x, u32 y, u32 width, u32 height, const void* data, bool set_mask, bool check_mask);
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virtual void CopyVRAM(u32 src_x, u32 src_y, u32 dst_x, u32 dst_y, u32 width, u32 height);
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virtual void DispatchRenderCommand();
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virtual void FlushRender();
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virtual void ClearDisplay();
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virtual void UpdateDisplay();
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virtual void DrawRendererStats(bool is_idle_frame);
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ALWAYS_INLINE void AddDrawTriangleTicks(s32 x1, s32 y1, s32 x2, s32 y2, s32 x3, s32 y3, bool shaded, bool textured,
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bool semitransparent)
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{
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// This will not produce the correct results for triangles which are partially outside the clip area.
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// However, usually it'll undershoot not overshoot. If we wanted to make this more accurate, we'd need to intersect
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// the edges with the clip rectangle.
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ClampCoordinatesToDrawingArea(&x1, &y1);
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ClampCoordinatesToDrawingArea(&x2, &y2);
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ClampCoordinatesToDrawingArea(&x3, &y3);
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TickCount pixels = std::abs((x1 * y2 + x2 * y3 + x3 * y1 - x1 * y3 - x2 * y1 - x3 * y2) / 2);
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if (textured)
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pixels += pixels;
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if (semitransparent || m_GPUSTAT.check_mask_before_draw)
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pixels += (pixels + 1) / 2;
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if (m_GPUSTAT.SkipDrawingToActiveField())
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pixels /= 2;
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AddCommandTicks(pixels);
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}
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ALWAYS_INLINE void AddDrawRectangleTicks(u32 width, u32 height, bool textured, bool semitransparent)
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{
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u32 ticks_per_row = width;
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if (textured)
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ticks_per_row += width;
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if (semitransparent || m_GPUSTAT.check_mask_before_draw)
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ticks_per_row += (width + 1u) / 2u;
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if (m_GPUSTAT.SkipDrawingToActiveField())
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height = std::max<u32>(height / 2, 1u);
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AddCommandTicks(ticks_per_row * height);
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}
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ALWAYS_INLINE void AddDrawLineTicks(u32 width, u32 height, bool shaded)
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{
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if (m_GPUSTAT.SkipDrawingToActiveField())
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height = std::max<u32>(height / 2, 1u);
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AddCommandTicks(std::max(width, height));
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}
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HostDisplay* m_host_display = nullptr;
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std::unique_ptr<TimingEvent> m_crtc_tick_event;
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std::unique_ptr<TimingEvent> m_command_tick_event;
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// Pointer to VRAM, used for reads/writes. In the hardware backends, this is the shadow buffer.
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u16* m_vram_ptr = nullptr;
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union GPUSTAT
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{
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u32 bits;
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BitField<u32, u8, 0, 4> texture_page_x_base;
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BitField<u32, u8, 4, 1> texture_page_y_base;
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BitField<u32, GPUTransparencyMode, 5, 2> semi_transparency_mode;
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BitField<u32, GPUTextureMode, 7, 2> texture_color_mode;
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BitField<u32, bool, 9, 1> dither_enable;
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BitField<u32, bool, 10, 1> draw_to_displayed_field;
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BitField<u32, bool, 11, 1> set_mask_while_drawing;
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BitField<u32, bool, 12, 1> check_mask_before_draw;
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BitField<u32, u8, 13, 1> interlaced_field;
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BitField<u32, bool, 14, 1> reverse_flag;
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BitField<u32, bool, 15, 1> texture_disable;
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BitField<u32, u8, 16, 1> horizontal_resolution_2;
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BitField<u32, u8, 17, 2> horizontal_resolution_1;
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BitField<u32, bool, 19, 1> vertical_resolution;
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BitField<u32, bool, 20, 1> pal_mode;
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BitField<u32, bool, 21, 1> display_area_color_depth_24;
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BitField<u32, bool, 22, 1> vertical_interlace;
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BitField<u32, bool, 23, 1> display_disable;
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BitField<u32, bool, 24, 1> interrupt_request;
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BitField<u32, bool, 25, 1> dma_data_request;
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BitField<u32, bool, 26, 1> gpu_idle;
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BitField<u32, bool, 27, 1> ready_to_send_vram;
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BitField<u32, bool, 28, 1> ready_to_recieve_dma;
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BitField<u32, DMADirection, 29, 2> dma_direction;
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BitField<u32, bool, 31, 1> display_line_lsb;
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ALWAYS_INLINE bool IsMaskingEnabled() const
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{
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static constexpr u32 MASK = ((1 << 11) | (1 << 12));
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return ((bits & MASK) != 0);
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}
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ALWAYS_INLINE bool SkipDrawingToActiveField() const
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{
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static constexpr u32 MASK = (1 << 19) | (1 << 22) | (1 << 10);
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static constexpr u32 ACTIVE = (1 << 19) | (1 << 22);
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return ((bits & MASK) == ACTIVE);
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}
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ALWAYS_INLINE bool InInterleaved480iMode() const
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{
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static constexpr u32 ACTIVE = (1 << 19) | (1 << 22);
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return ((bits & ACTIVE) == ACTIVE);
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}
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// During transfer/render operations, if ((dst_pixel & mask_and) == 0) { pixel = src_pixel | mask_or }
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ALWAYS_INLINE u16 GetMaskAND() const
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{
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// return check_mask_before_draw ? 0x8000 : 0x0000;
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return Truncate16((bits << 3) & 0x8000);
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}
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ALWAYS_INLINE u16 GetMaskOR() const
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{
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// return set_mask_while_drawing ? 0x8000 : 0x0000;
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return Truncate16((bits << 4) & 0x8000);
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}
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} m_GPUSTAT = {};
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struct DrawMode
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{
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static constexpr u16 PALETTE_MASK = UINT16_C(0b0111111111111111);
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static constexpr u32 TEXTURE_WINDOW_MASK = UINT32_C(0b11111111111111111111);
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// original values
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GPUDrawModeReg mode_reg;
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u16 palette_reg; // from vertex
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u32 texture_window_value;
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// decoded values
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u32 texture_page_x;
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u32 texture_page_y;
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u32 texture_palette_x;
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u32 texture_palette_y;
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GPUTextureWindow texture_window;
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bool texture_x_flip;
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bool texture_y_flip;
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bool texture_page_changed;
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bool texture_window_changed;
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/// Returns a rectangle comprising the texture palette area.
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ALWAYS_INLINE_RELEASE Common::Rectangle<u32> GetTexturePaletteRectangle() const
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{
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static constexpr std::array<u32, 4> palette_widths = {{16, 256, 0, 0}};
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return Common::Rectangle<u32>::FromExtents(texture_palette_x, texture_palette_y,
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palette_widths[static_cast<u8>(mode_reg.texture_mode.GetValue())], 1);
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}
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ALWAYS_INLINE bool IsTexturePageChanged() const { return texture_page_changed; }
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ALWAYS_INLINE void SetTexturePageChanged() { texture_page_changed = true; }
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ALWAYS_INLINE void ClearTexturePageChangedFlag() { texture_page_changed = false; }
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ALWAYS_INLINE bool IsTextureWindowChanged() const { return texture_window_changed; }
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ALWAYS_INLINE void SetTextureWindowChanged() { texture_window_changed = true; }
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ALWAYS_INLINE void ClearTextureWindowChangedFlag() { texture_window_changed = false; }
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} m_draw_mode = {};
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Common::Rectangle<u32> m_drawing_area{0, 0, VRAM_WIDTH, VRAM_HEIGHT};
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struct DrawingOffset
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{
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s32 x;
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s32 y;
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} m_drawing_offset = {};
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bool m_console_is_pal = false;
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bool m_set_texture_disable_mask = false;
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bool m_drawing_area_changed = false;
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bool m_force_progressive_scan = false;
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bool m_force_ntsc_timings = false;
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struct CRTCState
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{
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struct Regs
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{
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static constexpr u32 DISPLAY_ADDRESS_START_MASK = 0b111'11111111'11111110;
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static constexpr u32 HORIZONTAL_DISPLAY_RANGE_MASK = 0b11111111'11111111'11111111;
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static constexpr u32 VERTICAL_DISPLAY_RANGE_MASK = 0b1111'11111111'11111111;
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union
|
|
{
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u32 display_address_start;
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BitField<u32, u16, 0, 10> X;
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BitField<u32, u16, 10, 9> Y;
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};
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union
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{
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|
u32 horizontal_display_range;
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BitField<u32, u16, 0, 12> X1;
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BitField<u32, u16, 12, 12> X2;
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};
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union
|
|
{
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|
u32 vertical_display_range;
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BitField<u32, u16, 0, 10> Y1;
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BitField<u32, u16, 10, 10> Y2;
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};
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} regs;
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u16 dot_clock_divider;
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// Size of the simulated screen in pixels. Depending on crop mode, this may include overscan area.
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u16 display_width;
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u16 display_height;
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// Top-left corner in screen coordinates where the outputted portion of VRAM is first visible.
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u16 display_origin_left;
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u16 display_origin_top;
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// Rectangle in VRAM coordinates describing the area of VRAM that is visible on screen.
|
|
u16 display_vram_left;
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|
u16 display_vram_top;
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|
u16 display_vram_width;
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|
u16 display_vram_height;
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// Visible range of the screen, in GPU ticks/lines. Clamped to lie within the active video region.
|
|
u16 horizontal_visible_start;
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|
u16 horizontal_visible_end;
|
|
u16 vertical_visible_start;
|
|
u16 vertical_visible_end;
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|
|
|
u16 horizontal_display_start;
|
|
u16 horizontal_display_end;
|
|
u16 vertical_display_start;
|
|
u16 vertical_display_end;
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|
|
|
u16 horizontal_total;
|
|
u16 horizontal_sync_start; // <- not currently saved to state, so we don't have to bump the version
|
|
u16 vertical_total;
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|
|
|
TickCount fractional_ticks;
|
|
TickCount current_tick_in_scanline;
|
|
u32 current_scanline;
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|
|
|
TickCount fractional_dot_ticks; // only used when timer0 is enabled
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|
|
|
bool in_hblank;
|
|
bool in_vblank;
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|
|
|
u8 interlaced_field; // 0 = odd, 1 = even
|
|
u8 interlaced_display_field;
|
|
u8 active_line_lsb;
|
|
} m_crtc_state = {};
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|
|
|
BlitterState m_blitter_state = BlitterState::Idle;
|
|
u32 m_command_total_words = 0;
|
|
TickCount m_pending_command_ticks = 0;
|
|
|
|
/// GPUREAD value for non-VRAM-reads.
|
|
u32 m_GPUREAD_latch = 0;
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|
|
|
/// True if currently executing/syncing.
|
|
bool m_syncing = false;
|
|
bool m_fifo_pushed = false;
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|
|
|
struct VRAMTransfer
|
|
{
|
|
u16 x;
|
|
u16 y;
|
|
u16 width;
|
|
u16 height;
|
|
u16 col;
|
|
u16 row;
|
|
} m_vram_transfer = {};
|
|
|
|
HeapFIFOQueue<u64, MAX_FIFO_SIZE> m_fifo;
|
|
std::vector<u32> m_blit_buffer;
|
|
u32 m_blit_remaining_words;
|
|
GPURenderCommand m_render_command{};
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|
|
|
ALWAYS_INLINE u32 FifoPop() { return Truncate32(m_fifo.Pop()); }
|
|
ALWAYS_INLINE u32 FifoPeek() { return Truncate32(m_fifo.Peek()); }
|
|
ALWAYS_INLINE u32 FifoPeek(u32 i) { return Truncate32(m_fifo.Peek(i)); }
|
|
|
|
TickCount m_max_run_ahead = 128;
|
|
u32 m_fifo_size = 128;
|
|
|
|
struct Stats
|
|
{
|
|
u32 num_vram_reads;
|
|
u32 num_vram_fills;
|
|
u32 num_vram_writes;
|
|
u32 num_vram_copies;
|
|
u32 num_vertices;
|
|
u32 num_polygons;
|
|
};
|
|
Stats m_stats = {};
|
|
Stats m_last_stats = {};
|
|
|
|
private:
|
|
using GP0CommandHandler = bool (GPU::*)();
|
|
using GP0CommandHandlerTable = std::array<GP0CommandHandler, 256>;
|
|
static GP0CommandHandlerTable GenerateGP0CommandHandlerTable();
|
|
|
|
// Rendering commands, returns false if not enough data is provided
|
|
bool HandleUnknownGP0Command();
|
|
bool HandleNOPCommand();
|
|
bool HandleClearCacheCommand();
|
|
bool HandleInterruptRequestCommand();
|
|
bool HandleSetDrawModeCommand();
|
|
bool HandleSetTextureWindowCommand();
|
|
bool HandleSetDrawingAreaTopLeftCommand();
|
|
bool HandleSetDrawingAreaBottomRightCommand();
|
|
bool HandleSetDrawingOffsetCommand();
|
|
bool HandleSetMaskBitCommand();
|
|
bool HandleRenderPolygonCommand();
|
|
bool HandleRenderRectangleCommand();
|
|
bool HandleRenderLineCommand();
|
|
bool HandleRenderPolyLineCommand();
|
|
bool HandleFillRectangleCommand();
|
|
bool HandleCopyRectangleCPUToVRAMCommand();
|
|
bool HandleCopyRectangleVRAMToCPUCommand();
|
|
bool HandleCopyRectangleVRAMToVRAMCommand();
|
|
|
|
static const GP0CommandHandlerTable s_GP0_command_handler_table;
|
|
};
|
|
|
|
extern std::unique_ptr<GPU> g_gpu;
|