sgilissen/purrChestrion
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
main
purrChestrion/purrChestrion-board/purrChestrion-board/purrChestrion-board.dsn
T
sgilissen 24c77bd3e0 Recreate board
2025-04-12 01:10:36 +02:00

1047 lines
46 KiB
Plaintext
Raw Permalink Blame History

(pcb "/home/sgilissen/gitdir/purrChestrion/purrChestrion-board/purrChestrion-board/purrChestrion-board.dsn"
(parser
(string_quote ")
(space_in_quoted_tokens on)
(host_cad "KiCad's Pcbnew")
(host_version "9.0.1")
)
(resolution um 10)
(unit um)
(structure
(layer F.Cu
(type signal)
(property
(index 0)
)
)
(layer B.Cu
(type signal)
(property
(index 1)
)
)
(boundary
(path pcb 0 231643 -36502.5 231926 -36543.2 232200 -36623.7 232460 -36742.4
232700 -36896.9 232916 -37084 233103 -37299.9 233258 -37540.3
233376 -37800.2 233457 -38074.3 233497 -38357.1 233500 -38500
233500 -98000 233498 -98142.9 233457 -98425.7 233376 -98699.9
233258 -98959.8 233103 -99200.2 232916 -99416.1 232700 -99603.2
232460 -99757.7 232200 -99876.4 231926 -99956.9 231643 -99997.6
231500 -100000 109000 -100000 108857 -99997.5 108574 -99956.8
108300 -99876.3 108040 -99757.6 107800 -99603.1 107584 -99416
107397 -99200.1 107242 -98959.7 107124 -98699.8 107043 -98425.7
107003 -98142.9 107000 -98000 107000 -38500 107003 -38357.1
107043 -38074.3 107124 -37800.2 107242 -37540.3 107397 -37299.9
107584 -37084 107800 -36896.9 108040 -36742.4 108300 -36623.7
108574 -36543.2 108857 -36502.5 109000 -36500 231500 -36500
231643 -36502.5)
)
(keepout "" (polygon signal 0 110613 -93605.3 110310 -93674.4 110018 -93781.8 109742 -93925.6
109488 -94103.4 109257 -94312.4 109056 -94549.1 108886 -94809.6
108751 -95089.7 108654 -95384.7 108594 -95689.8 108574 -96000
108594 -96310.2 108654 -96615.3 108751 -96910.3 108886 -97190.4
109056 -97450.9 109257 -97687.6 109488 -97896.6 109742 -98074.4
110018 -98218.2 110310 -98325.6 110613 -98394.7 110922 -98424.6
111233 -98414.6 111540 -98365 111838 -98276.6 112122 -98150.7
112388 -97989.6 112631 -97795.8 112847 -97572.5 113033 -97323.4
113186 -97052.5 113302 -96764.4 113381 -96463.7 113421 -96155.4
113423 -96000 113421 -95844.6 113381 -95536.3 113302 -95235.6
113186 -94947.5 113033 -94676.6 112847 -94427.5 112631 -94204.2
112388 -94010.4 112122 -93849.3 111838 -93723.4 111540 -93635
111233 -93585.4 110922 -93575.4 110613 -93605.3))
(keepout "" (polygon signal 0 229613 -93605.3 229310 -93674.4 229018 -93781.8 228742 -93925.6
228488 -94103.4 228257 -94312.4 228056 -94549.1 227886 -94809.6
227751 -95089.7 227654 -95384.7 227594 -95689.8 227574 -96000
227594 -96310.2 227654 -96615.3 227751 -96910.3 227886 -97190.4
228056 -97450.9 228257 -97687.6 228488 -97896.6 228742 -98074.4
229018 -98218.2 229310 -98325.6 229613 -98394.7 229922 -98424.6
230233 -98414.6 230540 -98365 230838 -98276.6 231122 -98150.7
231388 -97989.6 231631 -97795.8 231847 -97572.5 232033 -97323.4
232186 -97052.5 232302 -96764.4 232381 -96463.7 232421 -96155.4
232423 -96000 232421 -95844.6 232381 -95536.3 232302 -95235.6
232186 -94947.5 232033 -94676.6 231847 -94427.5 231631 -94204.2
231388 -94010.4 231122 -93849.3 230838 -93723.4 230540 -93635
230233 -93585.4 229922 -93575.4 229613 -93605.3))
(keepout "" (polygon signal 0 110613 -37605.3 110310 -37674.4 110018 -37781.8 109742 -37925.6
109488 -38103.4 109257 -38312.4 109056 -38549.1 108886 -38809.6
108751 -39089.7 108654 -39384.7 108594 -39689.8 108574 -40000
108594 -40310.2 108654 -40615.3 108751 -40910.3 108886 -41190.4
109056 -41450.9 109257 -41687.6 109488 -41896.6 109742 -42074.4
110018 -42218.2 110310 -42325.6 110613 -42394.7 110922 -42424.6
111233 -42414.6 111540 -42365 111838 -42276.6 112122 -42150.7
112388 -41989.6 112631 -41795.8 112847 -41572.5 113033 -41323.4
113186 -41052.5 113302 -40764.4 113381 -40463.7 113421 -40155.4
113423 -40000 113421 -39844.6 113381 -39536.3 113302 -39235.6
113186 -38947.5 113033 -38676.6 112847 -38427.5 112631 -38204.2
112388 -38010.4 112122 -37849.3 111838 -37723.4 111540 -37635
111233 -37585.4 110922 -37575.4 110613 -37605.3))
(keepout "" (polygon signal 0 229613 -37605.3 229310 -37674.4 229018 -37781.8 228742 -37925.6
228488 -38103.4 228257 -38312.4 228056 -38549.1 227886 -38809.6
227751 -39089.7 227654 -39384.7 227594 -39689.8 227574 -40000
227594 -40310.2 227654 -40615.3 227751 -40910.3 227886 -41190.4
228056 -41450.9 228257 -41687.6 228488 -41896.6 228742 -42074.4
229018 -42218.2 229310 -42325.6 229613 -42394.7 229922 -42424.6
230233 -42414.6 230540 -42365 230838 -42276.6 231122 -42150.7
231388 -41989.6 231631 -41795.8 231847 -41572.5 232033 -41323.4
232186 -41052.5 232302 -40764.4 232381 -40463.7 232421 -40155.4
232423 -40000 232421 -39844.6 232381 -39536.3 232302 -39235.6
232186 -38947.5 232033 -38676.6 231847 -38427.5 231631 -38204.2
231388 -38010.4 231122 -37849.3 230838 -37723.4 230540 -37635
230233 -37585.4 229922 -37575.4 229613 -37605.3))
(via "Via[0-1]_600:300_um")
(rule
(width 800)
(clearance 200)
(clearance 50 (type smd_smd))
)
)
(placement
(component "Diode_THT:D_A-405_P10.16mm_Horizontal"
(place D2 134000.000000 -80420.000000 front -90.000000 (PN D))
(place D4 142000.000000 -80420.000000 front -90.000000 (PN D))
(place D1 130000.000000 -80340.000000 front -90.000000 (PN D))
(place D3 138000.000000 -80420.000000 front -90.000000 (PN D))
)
(component "Package_DIP:DIP-28_W7.62mm"
(place U2 116170.000000 -40560.000000 front 0.000000 (PN MCP23017_SP))
(place U1 176380.000000 -40520.000000 front 0.000000 (PN MCP23017_SP))
)
(component "Package_DIP:DIP-14_W7.62mm"
(place U7 128630.000000 -77250.000000 front 90.000000 (PN CD4066BE))
(place U6 154290.000000 -77250.000000 front 90.000000 (PN CD4066BE))
(place U5 154050.000000 -66750.000000 front 90.000000 (PN CD4066BE))
(place U4 154290.000000 -56630.000000 front 90.000000 (PN CD4066BE))
(place U3 154290.000000 -46250.000000 front 90.000000 (PN CD4066BE))
(place U9 128590.000000 -66750.000000 front 90.000000 (PN CD4066BE))
(place U8 128590.000000 -56250.000000 front 90.000000 (PN CD4066BE))
)
(component Connector_PinHeader_2.54mm:PinHeader_1x07_P2.54mm_Vertical
(place J9 225550.000000 -44610.000000 front -90.000000 (PN "ARDUINO GPIO A1-A7"))
)
(component Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical
(place J3 221275.000000 -96000.000000 front -90.000000 (PN "5V IN"))
(place J8 207275.000000 -96000.000000 front -90.000000 (PN "MIDI Act LED"))
)
(component Connector_PinHeader_2.54mm:PinHeader_1x08_P2.54mm_Vertical
(place J2 148260.000000 -96000.000000 front 90.000000 (PN ROWS))
)
(component Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical::1
(place J4 190000.000000 -96000.000000 front 90.000000 (PN "MIDI Input"))
)
(component "Package_DIP:DIP-8_W7.62mm"
(place U10 188380.000000 -81120.000000 front 90.000000 (PN 6N137))
)
(component Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal
(place R5 229500.000000 -85080.000000 front 90.000000 (PN R220))
)
(component "Diode_THT:D_A-405_P10.16mm_Horizontal::1"
(place D5 186340.000000 -86000.000000 front 0.000000 (PN D))
)
(component Connector_PinHeader_2.54mm:PinHeader_1x06_P2.54mm_Vertical
(place J1 129880.000000 -96000.000000 front 90.000000 (PN COLUMNS))
)
(component Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal::1
(place R1 196500.000000 -89500.000000 front 180.000000 (PN R220))
)
(component Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal::2
(place R2 173840.000000 -77500.000000 front 0.000000 (PN R10k))
(place R4 173920.000000 -84000.000000 front 0.000000 (PN R220))
(place R3 155420.000000 -81500.000000 front 0.000000 (PN R220))
)
(component Connector_PinHeader_2.54mm:PinHeader_1x04_P2.54mm_Vertical
(place J5 112000.000000 -50920.000000 front 0.000000 (PN "MCP23017-2 SPARES"))
)
(component Connector_PinHeader_2.54mm:PinHeader_1x04_P2.54mm_Vertical::1
(place J10 195390.000000 -44610.000000 front 90.000000 (PN I2C))
)
(component Module:Arduino_Nano
(place A1 190950.000000 -64110.000000 front 90.000000 (PN "Arduino NANO V3.x"))
)
(component Connector_PinHeader_2.54mm:PinHeader_1x11_P2.54mm_Vertical
(place J7 226330.000000 -69110.000000 front -90.000000 (PN "ARDUINO GPIO D2-D12"))
)
(component Connector_PinHeader_2.54mm:PinHeader_1x03_P2.54mm_Vertical
(place J6 178460.000000 -96000.000000 front 90.000000 (PN "MIDI Output"))
)
)
(library
(image "Diode_THT:D_A-405_P10.16mm_Horizontal"
(outline (path signal 120 2360 -1470 7800 -1470))
(outline (path signal 120 7800 -1470 7800 1470))
(outline (path signal 120 1140 0 2360 0))
(outline (path signal 120 9020 0 7800 0))
(outline (path signal 120 2360 1470 2360 -1470))
(outline (path signal 120 3140 1470 3140 -1470))
(outline (path signal 120 3260 1470 3260 -1470))
(outline (path signal 120 3380 1470 3380 -1470))
(outline (path signal 120 7800 1470 2360 1470))
(outline (path signal 50 -1150 -1600 11310 -1600))
(outline (path signal 50 11310 -1600 11310 1600))
(outline (path signal 50 -1150 1600 -1150 -1600))
(outline (path signal 50 11310 1600 -1150 1600))
(outline (path signal 100 2480 -1350 7680 -1350))
(outline (path signal 100 7680 -1350 7680 1350))
(outline (path signal 100 0 0 2480 0))
(outline (path signal 100 10160 0 7680 0))
(outline (path signal 100 2480 1350 2480 -1350))
(outline (path signal 100 3160 1350 3160 -1350))
(outline (path signal 100 3260 1350 3260 -1350))
(outline (path signal 100 3360 1350 3360 -1350))
(outline (path signal 100 7680 1350 2480 1350))
(pin Rect[A]Pad_1800.000000x1800.000000_um 1 0 0)
(pin Oval[A]Pad_1800.000000x1800.000000_um 2 10160 0)
)
(image "Package_DIP:DIP-28_W7.62mm"
(outline (path signal 120 1160 1330 1160 -34350))
(outline (path signal 120 1160 -34350 6460 -34350))
(outline (path signal 120 2810 1330 1160 1330))
(outline (path signal 120 6460 1330 4810 1330))
(outline (path signal 120 6460 -34350 6460 1330))
(outline (path signal 0 2865.43 1352.96 2865.43 1330 2870 1330 2888.06 1146.62
2941.55 970.278 3028.42 807.764 3145.32 665.32 3287.76 548.419
3450.28 461.553 3626.61 408.062 3810 390 3993.39 408.062
4169.72 461.553 4332.24 548.419 4474.68 665.32 4591.58 807.764
4678.45 970.278 4731.94 1146.62 4750 1330 4754.57 1330 4754.57 1352.96
4787.04 1385.43 4832.96 1385.43 4865.43 1352.96 4865.43 1330
4870 1330 4851.95 1135.23 4798.42 947.084 4711.23 771.982
4593.35 615.883 4448.79 484.102 4282.48 381.127 4100.08 310.465
3907.8 274.522 3712.2 274.522 3519.92 310.465 3337.52 381.127
3171.21 484.102 3026.65 615.883 2908.77 771.982 2821.58 947.084
2768.05 1135.23 2750 1330 2754.57 1330 2754.57 1352.96 2787.04 1385.43
2832.96 1385.43))
(outline (path signal 50 -1060 1530 8670 1530 8670 -34550 -1060 -34550))
(outline (path signal 100 635 270 1635 1270))
(outline (path signal 100 635 -34290 635 270))
(outline (path signal 100 1635 1270 6985 1270))
(outline (path signal 100 6985 1270 6985 -34290))
(outline (path signal 100 6985 -34290 635 -34290))
(pin RoundRect[A]Pad_1600.000000x1600.000000_250.951000_um_0.000000_0 1 0 0)
(pin Round[A]Pad_1600.000000_um 2 0 -2540)
(pin Round[A]Pad_1600.000000_um 3 0 -5080)
(pin Round[A]Pad_1600.000000_um 4 0 -7620)
(pin Round[A]Pad_1600.000000_um 5 0 -10160)
(pin Round[A]Pad_1600.000000_um 6 0 -12700)
(pin Round[A]Pad_1600.000000_um 7 0 -15240)
(pin Round[A]Pad_1600.000000_um 8 0 -17780)
(pin Round[A]Pad_1600.000000_um 9 0 -20320)
(pin Round[A]Pad_1600.000000_um 10 0 -22860)
(pin Round[A]Pad_1600.000000_um 11 0 -25400)
(pin Round[A]Pad_1600.000000_um 12 0 -27940)
(pin Round[A]Pad_1600.000000_um 13 0 -30480)
(pin Round[A]Pad_1600.000000_um 14 0 -33020)
(pin Round[A]Pad_1600.000000_um 15 7620 -33020)
(pin Round[A]Pad_1600.000000_um 16 7620 -30480)
(pin Round[A]Pad_1600.000000_um 17 7620 -27940)
(pin Round[A]Pad_1600.000000_um 18 7620 -25400)
(pin Round[A]Pad_1600.000000_um 19 7620 -22860)
(pin Round[A]Pad_1600.000000_um 20 7620 -20320)
(pin Round[A]Pad_1600.000000_um 21 7620 -17780)
(pin Round[A]Pad_1600.000000_um 22 7620 -15240)
(pin Round[A]Pad_1600.000000_um 23 7620 -12700)
(pin Round[A]Pad_1600.000000_um 24 7620 -10160)
(pin Round[A]Pad_1600.000000_um 25 7620 -7620)
(pin Round[A]Pad_1600.000000_um 26 7620 -5080)
(pin Round[A]Pad_1600.000000_um 27 7620 -2540)
(pin Round[A]Pad_1600.000000_um 28 7620 0)
)
(image "Package_DIP:DIP-14_W7.62mm"
(outline (path signal 120 6460 1330 4810 1330))
(outline (path signal 120 2810 1330 1160 1330))
(outline (path signal 120 1160 1330 1160 -16570))
(outline (path signal 120 6460 -16570 6460 1330))
(outline (path signal 120 1160 -16570 6460 -16570))
(outline (path signal 0 4851.95 1135.23 4798.42 947.084 4711.23 771.982 4593.35 615.883
4448.79 484.102 4282.48 381.127 4100.08 310.465 3907.8 274.522
3712.2 274.522 3519.92 310.465 3337.52 381.127 3171.21 484.102
3026.65 615.883 2908.77 771.982 2821.58 947.084 2768.05 1135.23
2750 1330 2754.57 1330 2754.57 1352.96 2787.04 1385.43 2832.96 1385.43
2865.43 1352.96 2865.43 1330 2870 1330 2888.06 1146.62 2941.55 970.278
3028.42 807.764 3145.32 665.32 3287.76 548.419 3450.28 461.553
3626.61 408.062 3810 390 3993.39 408.062 4169.72 461.553
4332.24 548.419 4474.68 665.32 4591.58 807.764 4678.45 970.278
4731.94 1146.62 4750 1330 4754.57 1330 4754.57 1352.96 4787.04 1385.43
4832.96 1385.43 4865.43 1352.96 4865.43 1330 4870 1330))
(outline (path signal 50 -1060 1530 -1060 -16770 8670 -16770 8670 1530))
(outline (path signal 100 6985 1270 6985 -16510))
(outline (path signal 100 1635 1270 6985 1270))
(outline (path signal 100 635 270 1635 1270))
(outline (path signal 100 6985 -16510 635 -16510))
(outline (path signal 100 635 -16510 635 270))
(pin RoundRect[A]Pad_1600.000000x1600.000000_250.951000_um_0.000000_0 1 0 0)
(pin Round[A]Pad_1600.000000_um 2 0 -2540)
(pin Round[A]Pad_1600.000000_um 3 0 -5080)
(pin Round[A]Pad_1600.000000_um 4 0 -7620)
(pin Round[A]Pad_1600.000000_um 5 0 -10160)
(pin Round[A]Pad_1600.000000_um 6 0 -12700)
(pin Round[A]Pad_1600.000000_um 7 0 -15240)
(pin Round[A]Pad_1600.000000_um 8 7620 -15240)
(pin Round[A]Pad_1600.000000_um 9 7620 -12700)
(pin Round[A]Pad_1600.000000_um 10 7620 -10160)
(pin Round[A]Pad_1600.000000_um 11 7620 -7620)
(pin Round[A]Pad_1600.000000_um 12 7620 -5080)
(pin Round[A]Pad_1600.000000_um 13 7620 -2540)
(pin Round[A]Pad_1600.000000_um 14 7620 0)
)
(image Connector_PinHeader_2.54mm:PinHeader_1x07_P2.54mm_Vertical
(outline (path signal 120 -1380 -16620 1380 -16620))
(outline (path signal 120 -1380 -1270 -1380 -16620))
(outline (path signal 120 -1380 -1270 1380 -1270))
(outline (path signal 120 1380 -1270 1380 -16620))
(outline (path signal 120 -1380 0 -1380 1380))
(outline (path signal 120 -1380 1380 0 1380))
(outline (path signal 50 -1770 -17020 1770 -17020))
(outline (path signal 50 1770 -17020 1770 1780))
(outline (path signal 50 -1770 1780 -1770 -17020))
(outline (path signal 50 1770 1780 -1770 1780))
(outline (path signal 100 -1270 -16510 -1270 635))
(outline (path signal 100 1270 -16510 -1270 -16510))
(outline (path signal 100 -1270 635 -635 1270))
(outline (path signal 100 -635 1270 1270 1270))
(outline (path signal 100 1270 1270 1270 -16510))
(pin Rect[A]Pad_1700.000000x1700.000000_um 1 0 0)
(pin Round[A]Pad_1700.000000_um 2 0 -2540)
(pin Round[A]Pad_1700.000000_um 3 0 -5080)
(pin Round[A]Pad_1700.000000_um 4 0 -7620)
(pin Round[A]Pad_1700.000000_um 5 0 -10160)
(pin Round[A]Pad_1700.000000_um 6 0 -12700)
(pin Round[A]Pad_1700.000000_um 7 0 -15240)
)
(image Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical
(outline (path signal 120 -1380 -3920 1380 -3920))
(outline (path signal 120 -1380 -1270 -1380 -3920))
(outline (path signal 120 -1380 -1270 1380 -1270))
(outline (path signal 120 1380 -1270 1380 -3920))
(outline (path signal 120 -1380 0 -1380 1380))
(outline (path signal 120 -1380 1380 0 1380))
(outline (path signal 50 -1770 -4320 1770 -4320))
(outline (path signal 50 1770 -4320 1770 1770))
(outline (path signal 50 -1770 1770 -1770 -4320))
(outline (path signal 50 1770 1770 -1770 1770))
(outline (path signal 100 -1270 -3810 -1270 635))
(outline (path signal 100 1270 -3810 -1270 -3810))
(outline (path signal 100 -1270 635 -635 1270))
(outline (path signal 100 -635 1270 1270 1270))
(outline (path signal 100 1270 1270 1270 -3810))
(pin Rect[A]Pad_1700.000000x1700.000000_um 1 0 0)
(pin Round[A]Pad_1700.000000_um 2 0 -2540)
)
(image Connector_PinHeader_2.54mm:PinHeader_1x08_P2.54mm_Vertical
(outline (path signal 120 -1380 1380 0 1380))
(outline (path signal 120 -1380 0 -1380 1380))
(outline (path signal 120 1380 -1270 1380 -19160))
(outline (path signal 120 -1380 -1270 1380 -1270))
(outline (path signal 120 -1380 -1270 -1380 -19160))
(outline (path signal 120 -1380 -19160 1380 -19160))
(outline (path signal 50 1770 1770 -1770 1770))
(outline (path signal 50 -1770 1770 -1770 -19550))
(outline (path signal 50 1770 -19550 1770 1770))
(outline (path signal 50 -1770 -19550 1770 -19550))
(outline (path signal 100 1270 1270 1270 -19050))
(outline (path signal 100 -635 1270 1270 1270))
(outline (path signal 100 -1270 635 -635 1270))
(outline (path signal 100 1270 -19050 -1270 -19050))
(outline (path signal 100 -1270 -19050 -1270 635))
(pin Rect[A]Pad_1700.000000x1700.000000_um 1 0 0)
(pin Round[A]Pad_1700.000000_um 2 0 -2540)
(pin Round[A]Pad_1700.000000_um 3 0 -5080)
(pin Round[A]Pad_1700.000000_um 4 0 -7620)
(pin Round[A]Pad_1700.000000_um 5 0 -10160)
(pin Round[A]Pad_1700.000000_um 6 0 -12700)
(pin Round[A]Pad_1700.000000_um 7 0 -15240)
(pin Round[A]Pad_1700.000000_um 8 0 -17780)
)
(image Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical::1
(outline (path signal 120 -1380 1380 0 1380))
(outline (path signal 120 -1380 0 -1380 1380))
(outline (path signal 120 1380 -1270 1380 -3920))
(outline (path signal 120 -1380 -1270 1380 -1270))
(outline (path signal 120 -1380 -1270 -1380 -3920))
(outline (path signal 120 -1380 -3920 1380 -3920))
(outline (path signal 50 1770 1770 -1770 1770))
(outline (path signal 50 -1770 1770 -1770 -4320))
(outline (path signal 50 1770 -4320 1770 1770))
(outline (path signal 50 -1770 -4320 1770 -4320))
(outline (path signal 100 1270 1270 1270 -3810))
(outline (path signal 100 -635 1270 1270 1270))
(outline (path signal 100 -1270 635 -635 1270))
(outline (path signal 100 1270 -3810 -1270 -3810))
(outline (path signal 100 -1270 -3810 -1270 635))
(pin Rect[A]Pad_1700.000000x1700.000000_um 1 0 0)
(pin Round[A]Pad_1700.000000_um 2 0 -2540)
)
(image "Package_DIP:DIP-8_W7.62mm"
(outline (path signal 120 6460 1330 4810 1330))
(outline (path signal 120 2810 1330 1160 1330))
(outline (path signal 120 1160 1330 1160 -8950))
(outline (path signal 120 6460 -8950 6460 1330))
(outline (path signal 120 1160 -8950 6460 -8950))
(outline (path signal 0 4851.95 1135.23 4798.42 947.084 4711.23 771.982 4593.35 615.883
4448.79 484.102 4282.48 381.127 4100.08 310.465 3907.8 274.522
3712.2 274.522 3519.92 310.465 3337.52 381.127 3171.21 484.102
3026.65 615.883 2908.77 771.982 2821.58 947.084 2768.05 1135.23
2750 1330 2754.57 1330 2754.57 1352.96 2787.04 1385.43 2832.96 1385.43
2865.43 1352.96 2865.43 1330 2870 1330 2888.06 1146.62 2941.55 970.278
3028.42 807.764 3145.32 665.32 3287.76 548.419 3450.28 461.553
3626.61 408.062 3810 390 3993.39 408.062 4169.72 461.553
4332.24 548.419 4474.68 665.32 4591.58 807.764 4678.45 970.278
4731.94 1146.62 4750 1330 4754.57 1330 4754.57 1352.96 4787.04 1385.43
4832.96 1385.43 4865.43 1352.96 4865.43 1330 4870 1330))
(outline (path signal 50 -1060 1520 -1060 -9140 8670 -9140 8670 1520))
(outline (path signal 100 6985 1270 6985 -8890))
(outline (path signal 100 1635 1270 6985 1270))
(outline (path signal 100 635 270 1635 1270))
(outline (path signal 100 6985 -8890 635 -8890))
(outline (path signal 100 635 -8890 635 270))
(pin RoundRect[A]Pad_1600.000000x1600.000000_250.951000_um_0.000000_0 1 0 0)
(pin Round[A]Pad_1600.000000_um 2 0 -2540)
(pin Round[A]Pad_1600.000000_um 3 0 -5080)
(pin Round[A]Pad_1600.000000_um 4 0 -7620)
(pin Round[A]Pad_1600.000000_um 5 7620 -7620)
(pin Round[A]Pad_1600.000000_um 6 7620 -5080)
(pin Round[A]Pad_1600.000000_um 7 7620 -2540)
(pin Round[A]Pad_1600.000000_um 8 7620 0)
)
(image Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal
(outline (path signal 120 8350 1370 1810 1370))
(outline (path signal 120 1810 1370 1810 -1370))
(outline (path signal 120 9120 0 8350 0))
(outline (path signal 120 1040 0 1810 0))
(outline (path signal 120 8350 -1370 8350 1370))
(outline (path signal 120 1810 -1370 8350 -1370))
(outline (path signal 50 11210 1500 -1050 1500))
(outline (path signal 50 -1050 1500 -1050 -1500))
(outline (path signal 50 11210 -1500 11210 1500))
(outline (path signal 50 -1050 -1500 11210 -1500))
(outline (path signal 100 8230 1250 1930 1250))
(outline (path signal 100 1930 1250 1930 -1250))
(outline (path signal 100 10160 0 8230 0))
(outline (path signal 100 0 0 1930 0))
(outline (path signal 100 8230 -1250 8230 1250))
(outline (path signal 100 1930 -1250 8230 -1250))
(pin Round[A]Pad_1600.000000_um 1 0 0)
(pin Oval[A]Pad_1600.000000x1600.000000_um 2 10160 0)
)
(image "Diode_THT:D_A-405_P10.16mm_Horizontal::1"
(outline (path signal 120 1140 0 2360 0))
(outline (path signal 120 2360 1470 2360 -1470))
(outline (path signal 120 2360 -1470 7800 -1470))
(outline (path signal 120 3140 1470 3140 -1470))
(outline (path signal 120 3260 1470 3260 -1470))
(outline (path signal 120 3380 1470 3380 -1470))
(outline (path signal 120 7800 1470 2360 1470))
(outline (path signal 120 7800 -1470 7800 1470))
(outline (path signal 120 9020 0 7800 0))
(outline (path signal 50 -1150 1600 -1150 -1600))
(outline (path signal 50 -1150 -1600 11310 -1600))
(outline (path signal 50 11310 1600 -1150 1600))
(outline (path signal 50 11310 -1600 11310 1600))
(outline (path signal 100 0 0 2480 0))
(outline (path signal 100 2480 1350 2480 -1350))
(outline (path signal 100 2480 -1350 7680 -1350))
(outline (path signal 100 3160 1350 3160 -1350))
(outline (path signal 100 3260 1350 3260 -1350))
(outline (path signal 100 3360 1350 3360 -1350))
(outline (path signal 100 7680 1350 2480 1350))
(outline (path signal 100 7680 -1350 7680 1350))
(outline (path signal 100 10160 0 7680 0))
(pin Rect[A]Pad_1800.000000x1800.000000_um 1 0 0)
(pin Oval[A]Pad_1800.000000x1800.000000_um 2 10160 0)
)
(image Connector_PinHeader_2.54mm:PinHeader_1x06_P2.54mm_Vertical
(outline (path signal 120 -1380 1380 0 1380))
(outline (path signal 120 -1380 0 -1380 1380))
(outline (path signal 120 1380 -1270 1380 -14080))
(outline (path signal 120 -1380 -1270 1380 -1270))
(outline (path signal 120 -1380 -1270 -1380 -14080))
(outline (path signal 120 -1380 -14080 1380 -14080))
(outline (path signal 50 1770 1770 -1770 1770))
(outline (path signal 50 -1770 1770 -1770 -14470))
(outline (path signal 50 1770 -14470 1770 1770))
(outline (path signal 50 -1770 -14470 1770 -14470))
(outline (path signal 100 1270 1270 1270 -13970))
(outline (path signal 100 -635 1270 1270 1270))
(outline (path signal 100 -1270 635 -635 1270))
(outline (path signal 100 1270 -13970 -1270 -13970))
(outline (path signal 100 -1270 -13970 -1270 635))
(pin Rect[A]Pad_1700.000000x1700.000000_um 1 0 0)
(pin Round[A]Pad_1700.000000_um 2 0 -2540)
(pin Round[A]Pad_1700.000000_um 3 0 -5080)
(pin Round[A]Pad_1700.000000_um 4 0 -7620)
(pin Round[A]Pad_1700.000000_um 5 0 -10160)
(pin Round[A]Pad_1700.000000_um 6 0 -12700)
)
(image Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal::1
(outline (path signal 120 9120 0 8350 0))
(outline (path signal 120 8350 -1370 8350 1370))
(outline (path signal 120 8350 1370 1810 1370))
(outline (path signal 120 1810 -1370 8350 -1370))
(outline (path signal 120 1810 1370 1810 -1370))
(outline (path signal 120 1040 0 1810 0))
(outline (path signal 50 11210 -1500 11210 1500))
(outline (path signal 50 11210 1500 -1050 1500))
(outline (path signal 50 -1050 -1500 11210 -1500))
(outline (path signal 50 -1050 1500 -1050 -1500))
(outline (path signal 100 10160 0 8230 0))
(outline (path signal 100 8230 -1250 8230 1250))
(outline (path signal 100 8230 1250 1930 1250))
(outline (path signal 100 1930 -1250 8230 -1250))
(outline (path signal 100 1930 1250 1930 -1250))
(outline (path signal 100 0 0 1930 0))
(pin Round[A]Pad_1600.000000_um 1 0 0)
(pin Oval[A]Pad_1600.000000x1600.000000_um 2 10160 0)
)
(image Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal::2
(outline (path signal 120 1040 0 1810 0))
(outline (path signal 120 1810 1370 1810 -1370))
(outline (path signal 120 1810 -1370 8350 -1370))
(outline (path signal 120 8350 1370 1810 1370))
(outline (path signal 120 8350 -1370 8350 1370))
(outline (path signal 120 9120 0 8350 0))
(outline (path signal 50 -1050 1500 -1050 -1500))
(outline (path signal 50 -1050 -1500 11210 -1500))
(outline (path signal 50 11210 1500 -1050 1500))
(outline (path signal 50 11210 -1500 11210 1500))
(outline (path signal 100 0 0 1930 0))
(outline (path signal 100 1930 1250 1930 -1250))
(outline (path signal 100 1930 -1250 8230 -1250))
(outline (path signal 100 8230 1250 1930 1250))
(outline (path signal 100 8230 -1250 8230 1250))
(outline (path signal 100 10160 0 8230 0))
(pin Round[A]Pad_1600.000000_um 1 0 0)
(pin Oval[A]Pad_1600.000000x1600.000000_um 2 10160 0)
)
(image Connector_PinHeader_2.54mm:PinHeader_1x04_P2.54mm_Vertical
(outline (path signal 120 -1380 1380 0 1380))
(outline (path signal 120 -1380 0 -1380 1380))
(outline (path signal 120 -1380 -1270 -1380 -9000))
(outline (path signal 120 -1380 -1270 1380 -1270))
(outline (path signal 120 -1380 -9000 1380 -9000))
(outline (path signal 120 1380 -1270 1380 -9000))
(outline (path signal 50 -1770 1770 -1770 -9390))
(outline (path signal 50 -1770 -9390 1770 -9390))
(outline (path signal 50 1770 1770 -1770 1770))
(outline (path signal 50 1770 -9390 1770 1770))
(outline (path signal 100 -1270 635 -635 1270))
(outline (path signal 100 -1270 -8890 -1270 635))
(outline (path signal 100 -635 1270 1270 1270))
(outline (path signal 100 1270 1270 1270 -8890))
(outline (path signal 100 1270 -8890 -1270 -8890))
(pin Rect[A]Pad_1700.000000x1700.000000_um 1 0 0)
(pin Round[A]Pad_1700.000000_um 2 0 -2540)
(pin Round[A]Pad_1700.000000_um 3 0 -5080)
(pin Round[A]Pad_1700.000000_um 4 0 -7620)
)
(image Connector_PinHeader_2.54mm:PinHeader_1x04_P2.54mm_Vertical::1
(outline (path signal 120 -1380 1380 0 1380))
(outline (path signal 120 -1380 0 -1380 1380))
(outline (path signal 120 1380 -1270 1380 -9000))
(outline (path signal 120 -1380 -1270 1380 -1270))
(outline (path signal 120 -1380 -1270 -1380 -9000))
(outline (path signal 120 -1380 -9000 1380 -9000))
(outline (path signal 50 1770 1770 -1770 1770))
(outline (path signal 50 -1770 1770 -1770 -9390))
(outline (path signal 50 1770 -9390 1770 1770))
(outline (path signal 50 -1770 -9390 1770 -9390))
(outline (path signal 100 1270 1270 1270 -8890))
(outline (path signal 100 -635 1270 1270 1270))
(outline (path signal 100 -1270 635 -635 1270))
(outline (path signal 100 1270 -8890 -1270 -8890))
(outline (path signal 100 -1270 -8890 -1270 635))
(pin Rect[A]Pad_1700.000000x1700.000000_um 1 0 0)
(pin Round[A]Pad_1700.000000_um 2 0 -2540)
(pin Round[A]Pad_1700.000000_um 3 0 -5080)
(pin Round[A]Pad_1700.000000_um 4 0 -7620)
)
(image Module:Arduino_Nano
(outline (path signal 120 16640 3940 -1400 3940))
(outline (path signal 120 -1400 3940 -1400 1270))
(outline (path signal 120 13970 1270 16640 1270))
(outline (path signal 120 13970 1270 13970 -36830))
(outline (path signal 120 1270 1270 -1400 1270))
(outline (path signal 120 1270 -1270 1270 1270))
(outline (path signal 120 1270 -1270 -1400 -1270))
(outline (path signal 120 1270 -1270 1270 -36830))
(outline (path signal 120 -1400 -1270 -1400 -39500))
(outline (path signal 120 11560 -31620 11560 -42040))
(outline (path signal 120 3680 -31620 11560 -31620))
(outline (path signal 120 13970 -36830 16640 -36830))
(outline (path signal 120 1270 -36830 -1400 -36830))
(outline (path signal 120 16640 -39500 16640 3940))
(outline (path signal 120 16640 -39500 11560 -39500))
(outline (path signal 120 -1400 -39500 3680 -39500))
(outline (path signal 120 11560 -42040 3680 -42040))
(outline (path signal 120 3680 -42040 3680 -31620))
(outline (path signal 50 -1530 4060 16750 4060))
(outline (path signal 50 -1530 4060 -1530 -42160))
(outline (path signal 50 16750 -42160 16750 4060))
(outline (path signal 50 16750 -42160 -1530 -42160))
(outline (path signal 100 16510 3810 16510 -39370))
(outline (path signal 100 0 3810 16510 3810))
(outline (path signal 100 -1270 2540 0 3810))
(outline (path signal 100 11430 -31750 11430 -41910))
(outline (path signal 100 3810 -31750 11430 -31750))
(outline (path signal 100 16510 -39370 -1270 -39370))
(outline (path signal 100 -1270 -39370 -1270 2540))
(outline (path signal 100 11430 -41910 3810 -41910))
(outline (path signal 100 3810 -41910 3810 -31750))
(pin Rect[A]Pad_1600.000000x1600.000000_um 1 0 0)
(pin Oval[A]Pad_1600.000000x1600.000000_um 2 0 -2540)
(pin Oval[A]Pad_1600.000000x1600.000000_um 3 0 -5080)
(pin Oval[A]Pad_1600.000000x1600.000000_um 4 0 -7620)
(pin Oval[A]Pad_1600.000000x1600.000000_um 5 0 -10160)
(pin Oval[A]Pad_1600.000000x1600.000000_um 6 0 -12700)
(pin Oval[A]Pad_1600.000000x1600.000000_um 7 0 -15240)
(pin Oval[A]Pad_1600.000000x1600.000000_um 8 0 -17780)
(pin Oval[A]Pad_1600.000000x1600.000000_um 9 0 -20320)
(pin Oval[A]Pad_1600.000000x1600.000000_um 10 0 -22860)
(pin Oval[A]Pad_1600.000000x1600.000000_um 11 0 -25400)
(pin Oval[A]Pad_1600.000000x1600.000000_um 12 0 -27940)
(pin Oval[A]Pad_1600.000000x1600.000000_um 13 0 -30480)
(pin Oval[A]Pad_1600.000000x1600.000000_um 14 0 -33020)
(pin Oval[A]Pad_1600.000000x1600.000000_um 15 0 -35560)
(pin Oval[A]Pad_1600.000000x1600.000000_um 16 15240 -35560)
(pin Oval[A]Pad_1600.000000x1600.000000_um 17 15240 -33020)
(pin Oval[A]Pad_1600.000000x1600.000000_um 18 15240 -30480)
(pin Oval[A]Pad_1600.000000x1600.000000_um 19 15240 -27940)
(pin Oval[A]Pad_1600.000000x1600.000000_um 20 15240 -25400)
(pin Oval[A]Pad_1600.000000x1600.000000_um 21 15240 -22860)
(pin Oval[A]Pad_1600.000000x1600.000000_um 22 15240 -20320)
(pin Oval[A]Pad_1600.000000x1600.000000_um 23 15240 -17780)
(pin Oval[A]Pad_1600.000000x1600.000000_um 24 15240 -15240)
(pin Oval[A]Pad_1600.000000x1600.000000_um 25 15240 -12700)
(pin Oval[A]Pad_1600.000000x1600.000000_um 26 15240 -10160)
(pin Oval[A]Pad_1600.000000x1600.000000_um 27 15240 -7620)
(pin Oval[A]Pad_1600.000000x1600.000000_um 28 15240 -5080)
(pin Oval[A]Pad_1600.000000x1600.000000_um 29 15240 -2540)
(pin Oval[A]Pad_1600.000000x1600.000000_um 30 15240 0)
)
(image Connector_PinHeader_2.54mm:PinHeader_1x11_P2.54mm_Vertical
(outline (path signal 120 -1380 -26780 1380 -26780))
(outline (path signal 120 -1380 -1270 -1380 -26780))
(outline (path signal 120 -1380 -1270 1380 -1270))
(outline (path signal 120 1380 -1270 1380 -26780))
(outline (path signal 120 -1380 0 -1380 1380))
(outline (path signal 120 -1380 1380 0 1380))
(outline (path signal 50 -1770 -27170 1770 -27170))
(outline (path signal 50 1770 -27170 1770 1770))
(outline (path signal 50 -1770 1770 -1770 -27170))
(outline (path signal 50 1770 1770 -1770 1770))
(outline (path signal 100 -1270 -26670 -1270 635))
(outline (path signal 100 1270 -26670 -1270 -26670))
(outline (path signal 100 -1270 635 -635 1270))
(outline (path signal 100 -635 1270 1270 1270))
(outline (path signal 100 1270 1270 1270 -26670))
(pin Rect[A]Pad_1700.000000x1700.000000_um 1 0 0)
(pin Round[A]Pad_1700.000000_um 2 0 -2540)
(pin Round[A]Pad_1700.000000_um 3 0 -5080)
(pin Round[A]Pad_1700.000000_um 4 0 -7620)
(pin Round[A]Pad_1700.000000_um 5 0 -10160)
(pin Round[A]Pad_1700.000000_um 6 0 -12700)
(pin Round[A]Pad_1700.000000_um 7 0 -15240)
(pin Round[A]Pad_1700.000000_um 8 0 -17780)
(pin Round[A]Pad_1700.000000_um 9 0 -20320)
(pin Round[A]Pad_1700.000000_um 10 0 -22860)
(pin Round[A]Pad_1700.000000_um 11 0 -25400)
)
(image Connector_PinHeader_2.54mm:PinHeader_1x03_P2.54mm_Vertical
(outline (path signal 120 -1380 -6460 1380 -6460))
(outline (path signal 120 1380 -1270 1380 -6460))
(outline (path signal 120 -1380 -1270 -1380 -6460))
(outline (path signal 120 -1380 -1270 1380 -1270))
(outline (path signal 120 -1380 0 -1380 1380))
(outline (path signal 120 -1380 1380 0 1380))
(outline (path signal 50 1770 -6850 1770 1770))
(outline (path signal 50 -1770 -6850 1770 -6850))
(outline (path signal 50 1770 1770 -1770 1770))
(outline (path signal 50 -1770 1770 -1770 -6850))
(outline (path signal 100 1270 -6350 -1270 -6350))
(outline (path signal 100 -1270 -6350 -1270 635))
(outline (path signal 100 -1270 635 -635 1270))
(outline (path signal 100 1270 1270 1270 -6350))
(outline (path signal 100 -635 1270 1270 1270))
(pin Rect[A]Pad_1700.000000x1700.000000_um 1 0 0)
(pin Round[A]Pad_1700.000000_um 2 0 -2540)
(pin Round[A]Pad_1700.000000_um 3 0 -5080)
)
(padstack Round[A]Pad_1600.000000_um
(shape (circle F.Cu 1600))
(shape (circle B.Cu 1600))
(attach off)
)
(padstack Round[A]Pad_1700.000000_um
(shape (circle F.Cu 1700))
(shape (circle B.Cu 1700))
(attach off)
)
(padstack Oval[A]Pad_1600.000000x1600.000000_um
(shape (path F.Cu 1600 0 0 0 0))
(shape (path B.Cu 1600 0 0 0 0))
(attach off)
)
(padstack Oval[A]Pad_1800.000000x1800.000000_um
(shape (path F.Cu 1800 0 0 0 0))
(shape (path B.Cu 1800 0 0 0 0))
(attach off)
)
(padstack RoundRect[A]Pad_1600.000000x1600.000000_250.951000_um_0.000000_0
(shape (polygon F.Cu 0 -800.951 550 -781.848 646.035 -727.449 727.449 -646.035 781.848
-549.999 800.95 550 800.951 646.035 781.848 727.449 727.449
781.848 646.035 800.95 549.999 800.951 -550 781.848 -646.035
727.449 -727.449 646.035 -781.848 549.999 -800.95 -550 -800.951
-646.035 -781.848 -727.449 -727.449 -781.848 -646.035 -800.95 -549.999
-800.951 550))
(shape (polygon B.Cu 0 -800.951 550 -781.848 646.035 -727.449 727.449 -646.035 781.848
-549.999 800.95 550 800.951 646.035 781.848 727.449 727.449
781.848 646.035 800.95 549.999 800.951 -550 781.848 -646.035
727.449 -727.449 646.035 -781.848 549.999 -800.95 -550 -800.951
-646.035 -781.848 -727.449 -727.449 -781.848 -646.035 -800.95 -549.999
-800.951 550))
(attach off)
)
(padstack Rect[A]Pad_1600.000000x1600.000000_um
(shape (rect F.Cu -800 -800 800 800))
(shape (rect B.Cu -800 -800 800 800))
(attach off)
)
(padstack Rect[A]Pad_1700.000000x1700.000000_um
(shape (rect F.Cu -850 -850 850 850))
(shape (rect B.Cu -850 -850 850 850))
(attach off)
)
(padstack Rect[A]Pad_1800.000000x1800.000000_um
(shape (rect F.Cu -900 -900 900 900))
(shape (rect B.Cu -900 -900 900 900))
(attach off)
)
(padstack "Via[0-1]_600:300_um"
(shape (circle F.Cu 600))
(shape (circle B.Cu 600))
(attach off)
)
)
(network
(net "Net-(J4-Pin_2)"
(pins J4-2 R1-1)
)
(net "Net-(D5-K)"
(pins U10-2 D5-1 R1-2)
)
(net +5V
(pins U2-9 U2-15 U2-18 U7-7 U6-7 U10-8 U1-9 U1-18 U5-7 U4-14 U3-14 U9-7 R2-1
J10-4 A1-27 R3-2 U8-7)
)
(net "Net-(A1-D0{slash}RX)"
(pins U10-7 R2-2 A1-2)
)
(net "Net-(J6-Pin_3)"
(pins R3-1 J6-3)
)
(net "Net-(J6-Pin_1)"
(pins R4-1 J6-1)
)
(net "Net-(A1-D1{slash}TX)"
(pins R4-2 A1-1)
)
(net "Net-(J8-Pin_1)"
(pins J8-1 R5-1)
)
(net "Net-(A1-D13)"
(pins R5-2 A1-16)
)
(net GND
(pins U2-10 U2-16 U2-17 U7-14 J3-2 U6-14 J8-2 U10-5 U1-10 U1-15 U1-16 U1-17
U5-14 U4-7 U3-7 U9-14 J10-1 A1-4 A1-29 U8-14 J6-2)
)
(net "unconnected-(U10-NC-Pad1)"
(pins U10-1)
)
(net "Net-(D5-A)"
(pins J4-1 U10-3 D5-2)
)
(net "unconnected-(U10-VO-Pad6)"
(pins U10-6)
)
(net "unconnected-(U10-NC-Pad4)"
(pins U10-4)
)
(net "Net-(U1-GPA6)"
(pins U1-27 U4-6)
)
(net "Net-(U1-GPB0)"
(pins U1-1 U5-13)
)
(net "Net-(U1-GPA4)"
(pins U1-25 U4-13)
)
(net "Net-(U1-GPB4)"
(pins U6-13 U1-5)
)
(net "Net-(U1-GPB6)"
(pins U6-6 U1-7)
)
(net "unconnected-(U1-NC-Pad11)"
(pins U1-11)
)
(net "Net-(U1-GPA7)"
(pins U1-28 U4-12)
)
(net "Net-(U1-GPA2)"
(pins U1-23 U3-6)
)
(net "unconnected-(U1-NC-Pad14)"
(pins U1-14)
)
(net "Net-(U1-GPA3)"
(pins U1-24 U3-12)
)
(net "unconnected-(U1-INTB-Pad19)"
(pins U1-19)
)
(net "Net-(U1-GPB2)"
(pins U1-3 U5-6)
)
(net "Net-(A1-A4)"
(pins U2-13 U1-13 J10-3 A1-23)
)
(net "Net-(U1-GPB1)"
(pins U1-2 U5-5)
)
(net "Net-(U1-GPB5)"
(pins U6-5 U1-6)
)
(net "Net-(A1-A5)"
(pins U2-12 U1-12 J10-2 A1-24)
)
(net "Net-(U1-GPB3)"
(pins U1-4 U5-12)
)
(net "unconnected-(U1-INTA-Pad20)"
(pins U1-20)
)
(net "Net-(U1-GPB7)"
(pins U6-12 U1-8)
)
(net "Net-(U1-GPA5)"
(pins U1-26 U4-5)
)
(net "Net-(U1-GPA1)"
(pins U1-22 U3-5)
)
(net "Net-(U1-GPA0)"
(pins U1-21 U3-13)
)
(net "Net-(U2-GPB0)"
(pins U2-1 U9-13)
)
(net "Net-(U2-GPA4)"
(pins U2-25 U7-13)
)
(net "Net-(U2-GPA7)"
(pins U2-28 U8-12)
)
(net "Net-(J5-Pin_2)"
(pins U2-6 J5-2)
)
(net "Net-(U2-GPA0)"
(pins U2-21 U8-13)
)
(net "Net-(J5-Pin_3)"
(pins U2-7 J5-3)
)
(net "Net-(U2-GPA2)"
(pins U2-23 U7-6)
)
(net "unconnected-(U2-INTB-Pad19)"
(pins U2-19)
)
(net "Net-(U2-GPA3)"
(pins U2-24 U7-12)
)
(net "Net-(U2-GPA1)"
(pins U2-22 U7-5)
)
(net "Net-(U2-GPA6)"
(pins U2-27 U8-6)
)
(net "Net-(J5-Pin_4)"
(pins U2-8 J5-4)
)
(net "Net-(U2-GPB2)"
(pins U2-3 U9-6)
)
(net "Net-(J5-Pin_1)"
(pins U2-5 J5-1)
)
(net "Net-(U2-GPB1)"
(pins U2-2 U9-5)
)
(net "Net-(U2-GPA5)"
(pins U2-26 U8-5)
)
(net "unconnected-(U2-INTA-Pad20)"
(pins U2-20)
)
(net "unconnected-(U2-NC-Pad11)"
(pins U2-11)
)
(net "Net-(U2-GPB3)"
(pins U2-4 U9-12)
)
(net "unconnected-(U2-NC-Pad14)"
(pins U2-14)
)
(net "Net-(D1-K)"
(pins U4-1 U4-4 U4-8 U4-11 D1-1 U3-1 U3-4 U3-8 U3-11)
)
(net "Net-(J2-Pin_7)"
(pins U6-9 J2-7 U4-9 U8-9)
)
(net "Net-(J2-Pin_8)"
(pins U6-10 J2-8 U4-10 U8-10)
)
(net "Net-(J2-Pin_6)"
(pins U6-3 J2-6 U4-3 U8-3)
)
(net "Net-(J2-Pin_5)"
(pins U7-2 U6-2 J2-5 U4-2)
)
(net "Net-(J2-Pin_4)"
(pins U7-10 J2-4 U5-10 U3-10 U9-10)
)
(net "Net-(J2-Pin_3)"
(pins U7-9 J2-3 U5-9 U3-9 U9-9)
)
(net "Net-(J2-Pin_1)"
(pins J2-1 U5-2 U3-2 U9-2 U8-2)
)
(net "Net-(J2-Pin_2)"
(pins U7-3 J2-2 U5-3 U3-3 U9-3)
)
(net "Net-(D2-K)"
(pins D2-1 U6-1 U6-4 U6-8 U6-11 U5-1 U5-4 U5-8 U5-11)
)
(net "Net-(D3-K)"
(pins U7-1 U7-4 U7-8 U7-11 U8-1 U8-4 U8-8 U8-11 D3-1)
)
(net "Net-(D4-K)"
(pins D4-1 U9-1 U9-4 U9-8 U9-11)
)
(net "Net-(A1-A7)"
(pins J9-7 A1-26)
)
(net "Net-(A1-D10)"
(pins A1-13 J7-3)
)
(net "Net-(A1-D5)"
(pins A1-8 J7-8)
)
(net "Net-(A1-D7)"
(pins A1-10 J7-6)
)
(net "Net-(A1-A1)"
(pins J9-3 A1-20)
)
(net "Net-(A1-D11)"
(pins A1-14 J7-2)
)
(net "Net-(A1-AREF)"
(pins J9-1 A1-18)
)
(net "Net-(A1-A2)"
(pins J9-4 A1-21)
)
(net "Net-(A1-D8)"
(pins A1-11 J7-5)
)
(net "unconnected-(A1-~{RESET}-Pad3)"
(pins A1-3)
)
(net "Net-(A1-D9)"
(pins A1-12 J7-4)
)
(net "Net-(A1-D6)"
(pins A1-9 J7-7)
)
(net "Net-(A1-D2)"
(pins A1-5 J7-11)
)
(net "Net-(A1-A3)"
(pins J9-5 A1-22)
)
(net "Net-(A1-D4)"
(pins A1-7 J7-9)
)
(net "Net-(A1-D12)"
(pins A1-15 J7-1)
)
(net "Net-(A1-VIN)"
(pins J3-1 A1-30)
)
(net "Net-(A1-D3)"
(pins A1-6 J7-10)
)
(net "Net-(A1-A0)"
(pins J9-2 A1-19)
)
(net "unconnected-(A1-~{RESET}-Pad28)"
(pins A1-28)
)
(net "unconnected-(A1-3V3-Pad17)"
(pins A1-17)
)
(net "Net-(A1-A6)"
(pins J9-6 A1-25)
)
(net "Net-(D1-A)"
(pins D1-2 J1-1)
)
(net "Net-(D4-A)"
(pins D4-2 J1-4)
)
(net "Net-(D3-A)"
(pins J1-3 D3-2)
)
(net "Net-(D2-A)"
(pins D2-2 J1-2)
)
(net "unconnected-(J1-Pin_5-Pad5)"
(pins J1-5)
)
(net "unconnected-(J1-Pin_6-Pad6)"
(pins J1-6)
)
(class kicad_default +5V GND "Net-(A1-A0)" "Net-(A1-A1)" "Net-(A1-A2)"
"Net-(A1-A3)" "Net-(A1-A4)" "Net-(A1-A5)" "Net-(A1-A6)" "Net-(A1-A7)"
"Net-(A1-AREF)" "Net-(A1-D0{slash}RX)" "Net-(A1-D10)" "Net-(A1-D11)"
"Net-(A1-D12)" "Net-(A1-D13)" "Net-(A1-D1{slash}TX)" "Net-(A1-D2)" "Net-(A1-D3)"
"Net-(A1-D4)" "Net-(A1-D5)" "Net-(A1-D6)" "Net-(A1-D7)" "Net-(A1-D8)"
"Net-(A1-D9)" "Net-(A1-VIN)" "Net-(D1-A)" "Net-(D1-K)" "Net-(D2-A)"
"Net-(D2-K)" "Net-(D3-A)" "Net-(D3-K)" "Net-(D4-A)" "Net-(D4-K)" "Net-(D5-A)"
"Net-(D5-K)" "Net-(J2-Pin_1)" "Net-(J2-Pin_2)" "Net-(J2-Pin_3)" "Net-(J2-Pin_4)"
"Net-(J2-Pin_5)" "Net-(J2-Pin_6)" "Net-(J2-Pin_7)" "Net-(J2-Pin_8)"
"Net-(J4-Pin_2)" "Net-(J5-Pin_1)" "Net-(J5-Pin_2)" "Net-(J5-Pin_3)"
"Net-(J5-Pin_4)" "Net-(J6-Pin_1)" "Net-(J6-Pin_3)" "Net-(J8-Pin_1)"
"Net-(U1-GPA0)" "Net-(U1-GPA1)" "Net-(U1-GPA2)" "Net-(U1-GPA3)" "Net-(U1-GPA4)"
"Net-(U1-GPA5)" "Net-(U1-GPA6)" "Net-(U1-GPA7)" "Net-(U1-GPB0)" "Net-(U1-GPB1)"
"Net-(U1-GPB2)" "Net-(U1-GPB3)" "Net-(U1-GPB4)" "Net-(U1-GPB5)" "Net-(U1-GPB6)"
"Net-(U1-GPB7)" "Net-(U2-GPA0)" "Net-(U2-GPA1)" "Net-(U2-GPA2)" "Net-(U2-GPA3)"
"Net-(U2-GPA4)" "Net-(U2-GPA5)" "Net-(U2-GPA6)" "Net-(U2-GPA7)" "Net-(U2-GPB0)"
"Net-(U2-GPB1)" "Net-(U2-GPB2)" "Net-(U2-GPB3)" "unconnected-(A1-3V3-Pad17)"
"unconnected-(A1-~{RESET}-Pad28)" "unconnected-(A1-~{RESET}-Pad3)" "unconnected-(J1-Pin_5-Pad5)"
"unconnected-(J1-Pin_6-Pad6)" "unconnected-(U1-INTA-Pad20)" "unconnected-(U1-INTB-Pad19)"
"unconnected-(U1-NC-Pad11)" "unconnected-(U1-NC-Pad14)" "unconnected-(U10-NC-Pad1)"
"unconnected-(U10-NC-Pad4)" "unconnected-(U10-VO-Pad6)" "unconnected-(U2-INTA-Pad20)"
"unconnected-(U2-INTB-Pad19)" "unconnected-(U2-NC-Pad11)" "unconnected-(U2-NC-Pad14)"
(circuit
(use_via "Via[0-1]_600:300_um")
)
(rule
(width 800)
(clearance 200)
)
)
)
(wiring
)
)
Reference in New Issue View Git Blame Copy Permalink